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hw/ide/mmio: Use CamelCase for MMIO_IDE state name

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Following docs/devel/style.rst guidelines, rename MMIOIDEState
as IdeMmioState.

Having the structure name and its typedef named equally,
we can manually convert from the old DECLARE_INSTANCE_CHECKER()
macro to the more recent OBJECT_DECLARE_SIMPLE_TYPE().

Note, due to that name mismatch, this macro wasn't automatically
converted during commit 8063396bf3 ("Use OBJECT_DECLARE_SIMPLE_TYPE
when possible").

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230220091358.17038-3-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2023-01-06 11:37:55 +01:00
parent eb8fde18ab
commit c79f63ff39
1 changed files with 13 additions and 15 deletions
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28
hw/ide/mmio.c
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@ -40,9 +40,7 @@
*/ */
#define TYPE_MMIO_IDE "mmio-ide" #define TYPE_MMIO_IDE "mmio-ide"
typedef struct MMIOIDEState MMIOState; OBJECT_DECLARE_SIMPLE_TYPE(MMIOIDEState, MMIO_IDE)
DECLARE_INSTANCE_CHECKER(MMIOState, MMIO_IDE,
TYPE_MMIO_IDE)
struct MMIOIDEState { struct MMIOIDEState {
/*< private >*/ /*< private >*/
@ -58,7 +56,7 @@ struct MMIOIDEState {
static void mmio_ide_reset(DeviceState *dev) static void mmio_ide_reset(DeviceState *dev)
{ {
MMIOState *s = MMIO_IDE(dev); MMIOIDEState *s = MMIO_IDE(dev);
ide_bus_reset(&s->bus); ide_bus_reset(&s->bus);
} }
@ -66,7 +64,7 @@ static void mmio_ide_reset(DeviceState *dev)
static uint64_t mmio_ide_read(void *opaque, hwaddr addr, static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
{ {
MMIOState *s = opaque; MMIOIDEState *s = opaque;
addr >>= s->shift; addr >>= s->shift;
if (addr & 7) if (addr & 7)
return ide_ioport_read(&s->bus, addr); return ide_ioport_read(&s->bus, addr);
@ -77,7 +75,7 @@ static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
static void mmio_ide_write(void *opaque, hwaddr addr, static void mmio_ide_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
MMIOState *s = opaque; MMIOIDEState *s = opaque;
addr >>= s->shift; addr >>= s->shift;
if (addr & 7) if (addr & 7)
ide_ioport_write(&s->bus, addr, val); ide_ioport_write(&s->bus, addr, val);
@ -94,14 +92,14 @@ static const MemoryRegionOps mmio_ide_ops = {
static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr, static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
{ {
MMIOState *s= opaque; MMIOIDEState *s = opaque;
return ide_status_read(&s->bus, 0); return ide_status_read(&s->bus, 0);
} }
static void mmio_ide_ctrl_write(void *opaque, hwaddr addr, static void mmio_ide_ctrl_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
MMIOState *s = opaque; MMIOIDEState *s = opaque;
ide_ctrl_write(&s->bus, 0, val); ide_ctrl_write(&s->bus, 0, val);
} }
@ -116,8 +114,8 @@ static const VMStateDescription vmstate_ide_mmio = {
.version_id = 3, .version_id = 3,
.minimum_version_id = 0, .minimum_version_id = 0,
.fields = (VMStateField[]) { .fields = (VMStateField[]) {
VMSTATE_IDE_BUS(bus, MMIOState), VMSTATE_IDE_BUS(bus, MMIOIDEState),
VMSTATE_IDE_DRIVES(bus.ifs, MMIOState), VMSTATE_IDE_DRIVES(bus.ifs, MMIOIDEState),
VMSTATE_END_OF_LIST() VMSTATE_END_OF_LIST()
} }
}; };
@ -125,7 +123,7 @@ static const VMStateDescription vmstate_ide_mmio = {
static void mmio_ide_realizefn(DeviceState *dev, Error **errp) static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
{ {
SysBusDevice *d = SYS_BUS_DEVICE(dev); SysBusDevice *d = SYS_BUS_DEVICE(dev);
MMIOState *s = MMIO_IDE(dev); MMIOIDEState *s = MMIO_IDE(dev);
ide_init2(&s->bus, s->irq); ide_init2(&s->bus, s->irq);
@ -140,14 +138,14 @@ static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
static void mmio_ide_initfn(Object *obj) static void mmio_ide_initfn(Object *obj)
{ {
SysBusDevice *d = SYS_BUS_DEVICE(obj); SysBusDevice *d = SYS_BUS_DEVICE(obj);
MMIOState *s = MMIO_IDE(obj); MMIOIDEState *s = MMIO_IDE(obj);
ide_bus_init(&s->bus, sizeof(s->bus), DEVICE(obj), 0, 2); ide_bus_init(&s->bus, sizeof(s->bus), DEVICE(obj), 0, 2);
sysbus_init_irq(d, &s->irq); sysbus_init_irq(d, &s->irq);
} }
static Property mmio_ide_properties[] = { static Property mmio_ide_properties[] = {
DEFINE_PROP_UINT32("shift", MMIOState, shift, 0), DEFINE_PROP_UINT32("shift", MMIOIDEState, shift, 0),
DEFINE_PROP_END_OF_LIST() DEFINE_PROP_END_OF_LIST()
}; };
@ -164,7 +162,7 @@ static void mmio_ide_class_init(ObjectClass *oc, void *data)
static const TypeInfo mmio_ide_type_info = { static const TypeInfo mmio_ide_type_info = {
.name = TYPE_MMIO_IDE, .name = TYPE_MMIO_IDE,
.parent = TYPE_SYS_BUS_DEVICE, .parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(MMIOState), .instance_size = sizeof(MMIOIDEState),
.instance_init = mmio_ide_initfn, .instance_init = mmio_ide_initfn,
.class_init = mmio_ide_class_init, .class_init = mmio_ide_class_init,
}; };
@ -176,7 +174,7 @@ static void mmio_ide_register_types(void)
void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1) void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1)
{ {
MMIOState *s = MMIO_IDE(dev); MMIOIDEState *s = MMIO_IDE(dev);
if (hd0 != NULL) { if (hd0 != NULL) {
ide_create_drive(&s->bus, 0, hd0); ide_create_drive(&s->bus, 0, hd0);