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include/exec: Widen tlb_hit/tlb_hit_page()

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tlb_addr is changed from target_ulong to uint64_t to match the type of
a CPUTLBEntry value, and the addressed is changed to vaddr.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230807155706.9580-8-anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Anton Johansson 2023-08-07 17:57:04 +02:00 committed by Richard Henderson
parent fc15bfb6a6
commit c78edb5639
1 changed files with 2 additions and 2 deletions
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4
include/exec/cpu-all.h
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@ -397,7 +397,7 @@ QEMU_BUILD_BUG_ON(TLB_FLAGS_MASK & TLB_SLOW_FLAGS_MASK);
* @addr: virtual address to test (must be page aligned) * @addr: virtual address to test (must be page aligned)
* @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value) * @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value)
*/ */
static inline bool tlb_hit_page(target_ulong tlb_addr, target_ulong addr) static inline bool tlb_hit_page(uint64_t tlb_addr, vaddr addr)
{ {
return addr == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)); return addr == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK));
} }
@ -408,7 +408,7 @@ static inline bool tlb_hit_page(target_ulong tlb_addr, target_ulong addr)
* @addr: virtual address to test (need not be page aligned) * @addr: virtual address to test (need not be page aligned)
* @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value) * @tlb_addr: TLB entry address (a CPUTLBEntry addr_read/write/code value)
*/ */
static inline bool tlb_hit(target_ulong tlb_addr, target_ulong addr) static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr)
{ {
return tlb_hit_page(tlb_addr, addr & TARGET_PAGE_MASK); return tlb_hit_page(tlb_addr, addr & TARGET_PAGE_MASK);
} }