target/riscv: Pass the same value to oprsz and maxsz for vmv.v.v
oprsz and maxsz are passed with the same value in commit: eee2d61e20
.
However, vmv.v.v was missed in that commit and should pass the same
value as well in its tcg_gen_gvec_2_ptr() call.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20211007081803.1705656-1-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
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@ -1619,7 +1619,8 @@ static bool trans_vmv_v_v(DisasContext *s, arg_vmv_v_v *a)
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over);
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tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_vl, 0, over);
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tcg_gen_gvec_2_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1),
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tcg_gen_gvec_2_ptr(vreg_ofs(s, a->rd), vreg_ofs(s, a->rs1),
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cpu_env, 0, s->vlen / 8, data, fns[s->sew]);
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cpu_env, s->vlen / 8, s->vlen / 8, data,
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fns[s->sew]);
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gen_set_label(over);
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gen_set_label(over);
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}
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}
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return true;
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return true;
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