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hw/riscv: migrate fdt field to generic MachineState

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This is a mechanical change to make the fdt available through
MachineState.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org>
This commit is contained in:
Alex Bennée 2021-03-03 17:36:37 +00:00
parent a6487d37c2
commit c65d7080d8
2 changed files with 10 additions and 11 deletions
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20
hw/riscv/virt.c
View File

@ -195,14 +195,14 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
hwaddr flashbase = virt_memmap[VIRT_FLASH].base; hwaddr flashbase = virt_memmap[VIRT_FLASH].base;
if (mc->dtb) { if (mc->dtb) {
fdt = s->fdt = load_device_tree(mc->dtb, &s->fdt_size); fdt = mc->fdt = load_device_tree(mc->dtb, &s->fdt_size);
if (!fdt) { if (!fdt) {
error_report("load_device_tree() failed"); error_report("load_device_tree() failed");
exit(1); exit(1);
} }
goto update_bootargs; goto update_bootargs;
} else { } else {
fdt = s->fdt = create_device_tree(&s->fdt_size); fdt = mc->fdt = create_device_tree(&s->fdt_size);
if (!fdt) { if (!fdt) {
error_report("create_device_tree() failed"); error_report("create_device_tree() failed");
exit(1); exit(1);
@ -444,12 +444,12 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap,
g_free(name); g_free(name);
name = g_strdup_printf("/soc/flash@%" PRIx64, flashbase); name = g_strdup_printf("/soc/flash@%" PRIx64, flashbase);
qemu_fdt_add_subnode(s->fdt, name); qemu_fdt_add_subnode(mc->fdt, name);
qemu_fdt_setprop_string(s->fdt, name, "compatible", "cfi-flash"); qemu_fdt_setprop_string(mc->fdt, name, "compatible", "cfi-flash");
qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", qemu_fdt_setprop_sized_cells(mc->fdt, name, "reg",
2, flashbase, 2, flashsize, 2, flashbase, 2, flashsize,
2, flashbase + flashsize, 2, flashsize); 2, flashbase + flashsize, 2, flashsize);
qemu_fdt_setprop_cell(s->fdt, name, "bank-width", 4); qemu_fdt_setprop_cell(mc->fdt, name, "bank-width", 4);
g_free(name); g_free(name);
update_bootargs: update_bootargs:
@ -667,9 +667,9 @@ static void virt_machine_init(MachineState *machine)
hwaddr end = riscv_load_initrd(machine->initrd_filename, hwaddr end = riscv_load_initrd(machine->initrd_filename,
machine->ram_size, kernel_entry, machine->ram_size, kernel_entry,
&start); &start);
qemu_fdt_setprop_cell(s->fdt, "/chosen", qemu_fdt_setprop_cell(machine->fdt, "/chosen",
"linux,initrd-start", start); "linux,initrd-start", start);
qemu_fdt_setprop_cell(s->fdt, "/chosen", "linux,initrd-end", qemu_fdt_setprop_cell(machine->fdt, "/chosen", "linux,initrd-end",
end); end);
} }
} else { } else {
@ -690,12 +690,12 @@ static void virt_machine_init(MachineState *machine)
/* Compute the fdt load address in dram */ /* Compute the fdt load address in dram */
fdt_load_addr = riscv_load_fdt(memmap[VIRT_DRAM].base, fdt_load_addr = riscv_load_fdt(memmap[VIRT_DRAM].base,
machine->ram_size, s->fdt); machine->ram_size, machine->fdt);
/* load the reset vector */ /* load the reset vector */
riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr, riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr,
virt_memmap[VIRT_MROM].base, virt_memmap[VIRT_MROM].base,
virt_memmap[VIRT_MROM].size, kernel_entry, virt_memmap[VIRT_MROM].size, kernel_entry,
fdt_load_addr, s->fdt); fdt_load_addr, machine->fdt);
/* SiFive Test MMIO device */ /* SiFive Test MMIO device */
sifive_test_create(memmap[VIRT_TEST].base); sifive_test_create(memmap[VIRT_TEST].base);

1
include/hw/riscv/virt.h
View File

@ -41,7 +41,6 @@ struct RISCVVirtState {
DeviceState *plic[VIRT_SOCKETS_MAX]; DeviceState *plic[VIRT_SOCKETS_MAX];
PFlashCFI01 *flash[2]; PFlashCFI01 *flash[2];
void *fdt;
int fdt_size; int fdt_size;
}; };