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trivial patches for 2023-09-08

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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2023-09-08

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# gpg: Signature made Fri 08 Sep 2023 06:09:23 EDT
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg:                issuer "mjt@tls.msk.ru"
# gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
# Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D  4324 457C E0A0 8044 65C5
#      Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931  4B22 701B 4F6B 1A69 3E59

* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (22 commits)
  qxl: don't assert() if device isn't yet initialized
  hw/net/vmxnet3: Fix guest-triggerable assert()
  tests/qtest/usb-hcd: Remove the empty "init" tests
  target/ppc: use g_free() in test_opcode_table()
  hw/ppc: use g_free() in spapr_tce_table_post_load()
  trivial: Simplify the spots that use TARGET_BIG_ENDIAN as a numeric value
  accel/tcg: Fix typo in translator_io_start() description
  tests/qtest/test-hmp: Fix migrate_set_parameter xbzrle-cache-size test
  docs tests: Fix use of migrate_set_parameter
  qemu-options.hx: Rephrase the descriptions of the -hd* and -cdrom options
  hw/display/xlnx_dp: update comments
  block: spelling fixes
  misc/other: spelling fixes
  qga/: spelling fixes
  tests/: spelling fixes
  scripts/: spelling fixes
  include/: spelling fixes
  audio: spelling fixes
  xen: spelling fix
  riscv: spelling fixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2023-09-08 10:06:25 -04:00
commit c5ea91da44
164 changed files with 272 additions and 327 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
audio/mixeng.h
View File

@ -38,7 +38,7 @@ typedef struct st_sample st_sample;
typedef void (t_sample) (struct st_sample *dst, const void *src, int samples);
typedef void (f_sample) (void *dst, const struct st_sample *src, int samples);
/* indices: [stereo][signed][swap endiannes][8, 16 or 32-bits] */
/* indices: [stereo][signed][swap endianness][8, 16 or 32-bits] */
extern t_sample *mixeng_conv[2][2][2][3];
extern f_sample *mixeng_clip[2][2][2][3];

2
backends/tpm/tpm_ioctl.h
View File

@ -238,7 +238,7 @@ struct ptm_lockstorage {
} req; /* request */
struct {
ptm_res tpm_result;
} resp; /* reponse */
} resp; /* response */
} u;
};

2
block.c
View File

@ -7589,7 +7589,7 @@ int bdrv_try_change_aio_context(BlockDriverState *bs, AioContext *ctx,
/*
* Recursion phase: go through all nodes of the graph.
* Take care of checking that all nodes support changing AioContext
* and drain them, builing a linear list of callbacks to run if everything
* and drain them, building a linear list of callbacks to run if everything
* is successful (the transaction itself).
*/
tran = tran_new();

4
block/block-copy.c
View File

@ -67,7 +67,7 @@ typedef struct BlockCopyCallState {
QLIST_ENTRY(BlockCopyCallState) list;
/*
* Fields that report information about return values and erros.
* Fields that report information about return values and errors.
* Protected by lock in BlockCopyState.
*/
bool error_is_read;
@ -462,7 +462,7 @@ static coroutine_fn int block_copy_task_run(AioTaskPool *pool,
* Do copy of cluster-aligned chunk. Requested region is allowed to exceed
* s->len only to cover last cluster when s->len is not aligned to clusters.
*
* No sync here: nor bitmap neighter intersecting requests handling, only copy.
* No sync here: neither bitmap nor intersecting requests handling, only copy.
*
* @method is an in-out argument, so that copy_range can be either extended to
* a full-size buffer or disabled if the copy_range attempt fails. The output

2
block/export/vduse-blk.c
View File

@ -138,7 +138,7 @@ static void vduse_blk_enable_queue(VduseDev *dev, VduseVirtq *vq)
aio_set_fd_handler(vblk_exp->export.ctx, vduse_queue_get_fd(vq),
on_vduse_vq_kick, NULL, NULL, NULL, vq);
/* Make sure we don't miss any kick afer reconnecting */
/* Make sure we don't miss any kick after reconnecting */
eventfd_write(vduse_queue_get_fd(vq), 1);
}

2
block/export/vhost-user-blk-server.c
View File

@ -1,5 +1,5 @@
/*
* Sharing QEMU block devices via vhost-user protocal
* Sharing QEMU block devices via vhost-user protocol
*
* Parts of the code based on nbd/server.c.
*

2
block/export/vhost-user-blk-server.h
View File

@ -1,5 +1,5 @@
/*
* Sharing QEMU block devices via vhost-user protocal
* Sharing QEMU block devices via vhost-user protocol
*
* Copyright (c) Coiby Xu <coiby.xu@gmail.com>.
* Copyright (c) 2020 Red Hat, Inc.

8
block/file-posix.c
View File

@ -1159,9 +1159,9 @@ static int raw_reopen_prepare(BDRVReopenState *state,
* As part of reopen prepare we also want to create new fd by
* raw_reconfigure_getfd(). But it wants updated "perm", when in
* bdrv_reopen_multiple() .bdrv_reopen_prepare() callback called prior to
* permission update. Happily, permission update is always a part (a seprate
* stage) of bdrv_reopen_multiple() so we can rely on this fact and
* reconfigure fd in raw_check_perm().
* permission update. Happily, permission update is always a part
* (a separate stage) of bdrv_reopen_multiple() so we can rely on this
* fact and reconfigure fd in raw_check_perm().
*/
s->reopen_state = state;
@ -3374,7 +3374,7 @@ static void raw_account_discard(BDRVRawState *s, uint64_t nbytes, int ret)
* of an array of zone descriptors.
* zones is an array of zone descriptors to hold zone information on reply;
* offset can be any byte within the entire size of the device;
* nr_zones is the maxium number of sectors the command should operate on.
* nr_zones is the maximum number of sectors the command should operate on.
*/
#if defined(CONFIG_BLKZONED)
static int coroutine_fn raw_co_zone_report(BlockDriverState *bs, int64_t offset,

2
block/graph-lock.c
View File

@ -95,7 +95,7 @@ static uint32_t reader_count(void)
QEMU_LOCK_GUARD(&aio_context_list_lock);
/* rd can temporarly be negative, but the total will *always* be >= 0 */
/* rd can temporarily be negative, but the total will *always* be >= 0 */
rd = orphaned_reader_count;
QTAILQ_FOREACH(brdv_graph, &aio_context_list, next_aio) {
rd += qatomic_read(&brdv_graph->reader_count);

2
block/io.c
View File

@ -342,7 +342,7 @@ static void coroutine_fn bdrv_co_yield_to_drain(BlockDriverState *bs,
* timer callback), it is a bug in the caller that should be fixed. */
assert(data.done);
/* Reaquire the AioContext of bs if we dropped it */
/* Reacquire the AioContext of bs if we dropped it */
if (ctx != co_ctx) {
aio_context_acquire(ctx);
}

2
block/linux-aio.c
View File

@ -227,7 +227,7 @@ static void qemu_laio_process_completions(LinuxAioState *s)
/* If we are nested we have to notify the level above that we are done
* by setting event_max to zero, upper level will then jump out of it's
* own `for` loop. If we are the last all counters droped to zero. */
* own `for` loop. If we are the last all counters dropped to zero. */
s->event_max = 0;
s->event_idx = 0;
}

2
block/mirror.c
View File

@ -502,7 +502,7 @@ static void coroutine_fn mirror_iteration(MirrorBlockJob *s)
job_pause_point(&s->common.job);
/* Find the number of consective dirty chunks following the first dirty
/* Find the number of consecutive dirty chunks following the first dirty
* one, and wait for in flight requests in them. */
bdrv_dirty_bitmap_lock(s->dirty_bitmap);
while (nb_chunks * s->granularity < s->buf_size) {

2
block/qcow2-refcount.c
View File

@ -2645,7 +2645,7 @@ rebuild_refcount_structure(BlockDriverState *bs, BdrvCheckResult *res,
* repeat all this until the reftable stops growing.
*
* (This loop will terminate, because with every cluster the
* reftable grows, it can accomodate a multitude of more refcounts,
* reftable grows, it can accommodate a multitude of more refcounts,
* so that at some point this must be able to cover the reftable
* and all refblocks describing it.)
*

2
block/vhdx.c
View File

@ -1077,7 +1077,7 @@ static int vhdx_open(BlockDriverState *bs, QDict *options, int flags,
goto fail;
}
/* endian convert populated BAT field entires */
/* endian convert populated BAT field entries */
for (i = 0; i < s->bat_entries; i++) {
s->bat[i] = le64_to_cpu(s->bat[i]);
}

4
block/vhdx.h
View File

@ -212,7 +212,7 @@ typedef struct QEMU_PACKED VHDXLogDataSector {
uint32_t sequence_high; /* 4 MSB of 8 byte sequence_number */
uint8_t data[4084]; /* raw data, bytes 8-4091 (inclusive).
see the data descriptor field for the
other mising bytes */
other missing bytes */
uint32_t sequence_low; /* 4 LSB of 8 byte sequence_number */
} VHDXLogDataSector;
@ -257,7 +257,7 @@ typedef struct QEMU_PACKED VHDXMetadataTableHeader {
#define VHDX_META_FLAGS_IS_USER 0x01 /* max 1024 entries */
#define VHDX_META_FLAGS_IS_VIRTUAL_DISK 0x02 /* virtual disk metadata if set,
otherwise file metdata */
otherwise file metadata */
#define VHDX_META_FLAGS_IS_REQUIRED 0x04 /* parse must understand this
entry to open the file */
typedef struct QEMU_PACKED VHDXMetadataTableEntry {

2
bsd-user/trace-events
View File

@ -1,4 +1,4 @@
# See docs/tracing.txt for syntax documentation.
# See docs/devel/tracing.rst for syntax documentation.
# bsd-user/signal.c
user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=0x%"PRIx64

6
chardev/char-socket.c
View File

@ -710,7 +710,7 @@ static void tcp_chr_telnet_init(Chardev *chr)
if (!s->is_tn3270) {
init->buflen = 12;
/* Prep the telnet negotion to put telnet in binary,
/* Prep the telnet negotiation to put telnet in binary,
* no echo, single char mode */
IACSET(init->buf, 0xff, 0xfb, 0x01); /* IAC WILL ECHO */
IACSET(init->buf, 0xff, 0xfb, 0x03); /* IAC WILL Suppress go ahead */
@ -718,7 +718,7 @@ static void tcp_chr_telnet_init(Chardev *chr)
IACSET(init->buf, 0xff, 0xfd, 0x00); /* IAC DO Binary */
} else {
init->buflen = 21;
/* Prep the TN3270 negotion based on RFC1576 */
/* Prep the TN3270 negotiation based on RFC1576 */
IACSET(init->buf, 0xff, 0xfd, 0x19); /* IAC DO EOR */
IACSET(init->buf, 0xff, 0xfb, 0x19); /* IAC WILL EOR */
IACSET(init->buf, 0xff, 0xfd, 0x00); /* IAC DO BINARY */
@ -1298,7 +1298,7 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock,
return false;
}
/* Validate any options which have a dependancy on client vs server */
/* Validate any options which have a dependency on client vs server */
if (!sock->has_server || sock->server) {
if (sock->has_reconnect) {
error_setg(errp,

2
chardev/char.c
View File

@ -1115,7 +1115,7 @@ ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend,
return NULL;
}
/* change successfull, clean up */
/* change successful, clean up */
chr_new->handover_yank_instance = false;
/*

6
cpu.c
View File

@ -420,11 +420,7 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
bool target_words_bigendian(void)
{
#if TARGET_BIG_ENDIAN
return true;
#else
return false;
#endif
return TARGET_BIG_ENDIAN;
}
const char *target_name(void)

2
crypto/afalg.c
View File

@ -73,7 +73,7 @@ qcrypto_afalg_comm_alloc(const char *type, const char *name,
QCryptoAFAlg *afalg;
afalg = g_new0(QCryptoAFAlg, 1);
/* initilize crypto API socket */
/* initialize crypto API socket */
afalg->opfd = -1;
afalg->tfmfd = qcrypto_afalg_socket_bind(type, name, errp);
if (afalg->tfmfd == -1) {

6
crypto/block-luks.c
View File

@ -244,7 +244,7 @@ qcrypto_block_luks_has_format(const uint8_t *buf,
*
* When calculating ESSIV IVs, the cipher length used by ESSIV
* may be different from the cipher length used for the block
* encryption, becauses dm-crypt uses the hash digest length
* encryption, because dm-crypt uses the hash digest length
* as the key size. ie, if you have AES 128 as the block cipher
* and SHA 256 as ESSIV hash, then ESSIV will use AES 256 as
* the cipher since that gets a key length matching the digest
@ -393,7 +393,7 @@ qcrypto_block_luks_from_disk_endian(QCryptoBlockLUKSHeader *hdr)
}
/*
* Stores the main LUKS header, taking care of endianess
* Stores the main LUKS header, taking care of endianness
*/
static int
qcrypto_block_luks_store_header(QCryptoBlock *block,
@ -423,7 +423,7 @@ qcrypto_block_luks_store_header(QCryptoBlock *block,
}
/*
* Loads the main LUKS header,and byteswaps it to native endianess
* Loads the main LUKS header, and byteswaps it to native endianness
* And run basic sanity checks on it
*/
static int

2
crypto/der.c
View File

@ -76,7 +76,7 @@ enum QCryptoDERTagEnc {
/**
* qcrypto_der_encode_length:
* @src_len: the length of source data
* @dst: distination to save the encoded 'length', if dst is NULL, only compute
* @dst: destination to save the encoded 'length', if dst is NULL, only compute
* the expected buffer size in bytes.
* @dst_len: output parameter, indicates how many bytes wrote.
*

6
crypto/der.h
View File

@ -249,7 +249,7 @@ void qcrypto_der_encode_octet_str(QCryptoEncodeContext *ctx,
* Start encoding a octet string, All fields between
* qcrypto_der_encode_octet_str_begin and qcrypto_der_encode_octet_str_end
* are encoded as an octet string. This is useful when we need to encode a
* encoded SEQUNCE as OCTET STRING.
* encoded SEQUENCE as OCTET STRING.
*/
void qcrypto_der_encode_octet_str_begin(QCryptoEncodeContext *ctx);
@ -260,7 +260,7 @@ void qcrypto_der_encode_octet_str_begin(QCryptoEncodeContext *ctx);
* Finish encoding a octet string, All fields between
* qcrypto_der_encode_octet_str_begin and qcrypto_der_encode_octet_str_end
* are encoded as an octet string. This is useful when we need to encode a
* encoded SEQUNCE as OCTET STRING.
* encoded SEQUENCE as OCTET STRING.
*/
void qcrypto_der_encode_octet_str_end(QCryptoEncodeContext *ctx);
@ -275,7 +275,7 @@ size_t qcrypto_der_encode_ctx_buffer_len(QCryptoEncodeContext *ctx);
/**
* qcrypto_der_encode_ctx_flush_and_free:
* @ctx: the encode context.
* @dst: the distination to save the encoded data, the length of dst should
* @dst: the destination to save the encoded data, the length of dst should
* not less than qcrypto_der_encode_cxt_buffer_len
*
* Flush all encoded data into dst, then free ctx.

12
docs/multi-thread-compression.txt
View File

@ -117,13 +117,13 @@ to support the multiple thread compression migration:
{qemu} migrate_set_capability compress on
3. Set the compression thread count on source:
{qemu} migrate_set_parameter compress_threads 12
{qemu} migrate_set_parameter compress-threads 12
4. Set the compression level on the source:
{qemu} migrate_set_parameter compress_level 1
{qemu} migrate_set_parameter compress-level 1
5. Set the decompression thread count on destination:
{qemu} migrate_set_parameter decompress_threads 3
{qemu} migrate_set_parameter decompress-threads 3
6. Start outgoing migration:
{qemu} migrate -d tcp:destination.host:4444
@ -133,9 +133,9 @@ to support the multiple thread compression migration:
The following are the default settings:
compress: off
compress_threads: 8
decompress_threads: 2
compress_level: 1 (which means best speed)
compress-threads: 8
decompress-threads: 2
compress-level: 1 (which means best speed)
So, only the first two steps are required to use the multiple
thread compression in migration. You can do more if the default

2
docs/rdma.txt
View File

@ -89,7 +89,7 @@ RUNNING:
First, set the migration speed to match your hardware's capabilities:
QEMU Monitor Command:
$ migrate_set_parameter max_bandwidth 40g # or whatever is the MAX of your RDMA device
$ migrate_set_parameter max-bandwidth 40g # or whatever is the MAX of your RDMA device
Next, on the destination machine, add the following to the QEMU command line:

2
ebpf/trace-events
View File

@ -1,4 +1,4 @@
# See docs/devel/tracing.txt for syntax documentation.
# See docs/devel/tracing.rst for syntax documentation.
# ebpf-rss.c
ebpf_error(const char *s1, const char *s2) "error in %s: %s"

8
hw/audio/fmopl.c
View File

@ -355,7 +355,7 @@ static void set_algorithm( OPL_CH *CH)
CH->connect2 = carrier;
}
/* ---------- frequency counter for operater update ---------- */
/* ---------- frequency counter for operator update ---------- */
static inline void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
{
int ksr;
@ -640,7 +640,7 @@ static int OPLOpenTable( void )
TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0;
}
/* make sinwave table (total level offet) */
/* make sinwave table (total level offset) */
/* degree 0 = degree 180 = off */
SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1];
for (s = 1;s <= SIN_ENT/4;s++){
@ -1075,7 +1075,7 @@ FM_OPL *OPLCreate(int clock, int rate)
char *ptr;
FM_OPL *OPL;
int state_size;
int max_ch = 9; /* normaly 9 channels */
int max_ch = 9; /* normally 9 channels */
if( OPL_LockTable() ==-1) return NULL;
/* allocate OPL state space */
@ -1092,7 +1092,7 @@ FM_OPL *OPLCreate(int clock, int rate)
OPL->clock = clock;
OPL->rate = rate;
OPL->max_ch = max_ch;
/* init grobal tables */
/* init global tables */
OPL_initialize(OPL);
/* reset chip */
OPLResetChip(OPL);

2
hw/audio/fmopl.h
View File

@ -69,7 +69,7 @@ typedef struct fm_opl_f {
/* FM channel slots */
OPL_CH *P_CH; /* pointer of CH */
int max_ch; /* maximum channel */
/* Rhythm sention */
/* Rhythm section */
uint8_t rhythm; /* Rhythm mode , key flag */
/* time tables */
int32_t AR_TABLE[76]; /* attack rate tables */

4
hw/audio/gusemu_hal.c
View File

@ -154,7 +154,7 @@ unsigned int gus_read(GUSEmuState * state, int port, int size)
case 0x8d:
{
int offset = 2 * (GUSregb(FunkSelReg3x3) & 0x0f);
offset += ((int) GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Funktion*2 */
offset += ((int) GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Function*2 */
value_read = GUSregw(offset);
}
break;
@ -353,7 +353,7 @@ void gus_write(GUSEmuState * state, int port, int size, unsigned int data)
if (!(GUSregb(GUS4cReset) & 0x01))
break; /* reset flag active? */
offset = 2 * (GUSregb(FunkSelReg3x3) & 0x0f);
offset += (GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Funktion*2 */
offset += (GUSregb(VoiceSelReg3x2) & 0x1f) << 5; /* = Voice*32 + Function*2 */
GUSregw(offset) = (uint16_t) ((GUSregw(offset) & readmask) | writedata);
}
break;

4
hw/audio/intel-hda-defs.h
View File

@ -418,7 +418,7 @@ enum {
#define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
#define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
/* Pin widget capabilies */
/* Pin widget capabilities */
#define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
#define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
#define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
@ -483,7 +483,7 @@ enum {
#define AC_PWRST_D2 0x02
#define AC_PWRST_D3 0x03
/* Processing capabilies */
/* Processing capabilities */
#define AC_PCAP_BENIGN (1<<0)
#define AC_PCAP_NUM_COEF (0xff<<8)
#define AC_PCAP_NUM_COEF_SHIFT 8

5
hw/display/qxl.c
View File

@ -1591,7 +1591,10 @@ static void qxl_set_mode(PCIQXLDevice *d, unsigned int modenr, int loadvm)
}
d->guest_slots[0].slot = slot;
assert(qxl_add_memslot(d, 0, devmem, QXL_SYNC) == 0);
if (qxl_add_memslot(d, 0, devmem, QXL_SYNC) != 0) {
qxl_set_guest_bug(d, "device isn't initialized yet");
return;
}
d->guest_primary.surface = surface;
qxl_create_guest_primary(d, 0, QXL_SYNC);

9
hw/display/xlnx_dp.c
View File

@ -380,13 +380,16 @@ static inline void xlnx_dp_audio_mix_buffer(XlnxDPState *s)
static void xlnx_dp_audio_callback(void *opaque, int avail)
{
/*
* Get some data from the DPDMA and compute these data.
* Then wait for QEMU's audio subsystem to call this callback.
* Get the individual left and right audio streams from the DPDMA,
* and fill the output buffer with the combined stereo audio data
* adjusted by the volume controls.
* QEMU's audio subsystem will call this callback repeatedly;
* we return the data from the output buffer until it is emptied,
* and then we will read data from the DPDMA again.
*/
XlnxDPState *s = XLNX_DP(opaque);
size_t written = 0;
/* If there are already some data don't get more data. */
if (s->byte_left == 0) {
s->audio_data_available[0] = xlnx_dpdma_start_operation(s->dpdma, 4,
true);

9
hw/microblaze/boot.c
View File

@ -140,22 +140,17 @@ void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base,
int kernel_size;
uint64_t entry, high;
uint32_t base32;
int big_endian = 0;
#if TARGET_BIG_ENDIAN
big_endian = 1;
#endif
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
&entry, NULL, &high, NULL,
big_endian, EM_MICROBLAZE, 0, 0);
TARGET_BIG_ENDIAN, EM_MICROBLAZE, 0, 0);
base32 = entry;
if (base32 == 0xc0000000) {
kernel_size = load_elf(kernel_filename, NULL,
translate_kernel_address, NULL,
&entry, NULL, NULL, NULL,
big_endian, EM_MICROBLAZE, 0, 0);
TARGET_BIG_ENDIAN, EM_MICROBLAZE, 0, 0);
}
/* Always boot into physical ram. */
boot_info.bootstrap_pc = (uint32_t)entry;

10
hw/mips/jazz.c
View File

@ -125,7 +125,7 @@ static void mips_jazz_init(MachineState *machine,
{
MemoryRegion *address_space = get_system_memory();
char *filename;
int bios_size, n, big_endian;
int bios_size, n;
Clock *cpuclk;
MIPSCPU *cpu;
MIPSCPUClass *mcc;
@ -157,12 +157,6 @@ static void mips_jazz_init(MachineState *machine,
[JAZZ_PICA61] = {33333333, 4},
};
#if TARGET_BIG_ENDIAN
big_endian = 1;
#else
big_endian = 0;
#endif
if (machine->ram_size > 256 * MiB) {
error_report("RAM size more than 256Mb is not supported");
exit(EXIT_FAILURE);
@ -301,7 +295,7 @@ static void mips_jazz_init(MachineState *machine,
dev = qdev_new("dp8393x");
qdev_set_nic_properties(dev, nd);
qdev_prop_set_uint8(dev, "it_shift", 2);
qdev_prop_set_bit(dev, "big_endian", big_endian > 0);
qdev_prop_set_bit(dev, "big_endian", TARGET_BIG_ENDIAN);
object_property_set_link(OBJECT(dev), "dma_mr",
OBJECT(rc4030_dma_mr), &error_abort);
sysbus = SYS_BUS_DEVICE(dev);

21
hw/mips/malta.c
View File

@ -870,7 +870,6 @@ static uint64_t load_kernel(void)
uint64_t kernel_entry, kernel_high, initrd_size;
long kernel_size;
ram_addr_t initrd_offset;
int big_endian;
uint32_t *prom_buf;
long prom_size;
int prom_index = 0;
@ -878,16 +877,10 @@ static uint64_t load_kernel(void)
char rng_seed_hex[sizeof(rng_seed) * 2 + 1];
size_t rng_seed_prom_offset;
#if TARGET_BIG_ENDIAN
big_endian = 1;
#else
big_endian = 0;
#endif
kernel_size = load_elf(loaderparams.kernel_filename, NULL,
cpu_mips_kseg0_to_phys, NULL,
&kernel_entry, NULL,
&kernel_high, NULL, big_endian, EM_MIPS,
&kernel_high, NULL, TARGET_BIG_ENDIAN, EM_MIPS,
1, 0);
if (kernel_size < 0) {
error_report("could not load kernel '%s': %s",
@ -1107,7 +1100,6 @@ void mips_malta_init(MachineState *machine)
I2CBus *smbus;
DriveInfo *dinfo;
int fl_idx = 0;
int be;
MaltaState *s;
PCIDevice *piix4;
DeviceState *dev;
@ -1144,12 +1136,6 @@ void mips_malta_init(MachineState *machine)
ram_low_postio);
}
#if TARGET_BIG_ENDIAN
be = 1;
#else
be = 0;
#endif
/* FPGA */
/* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
@ -1161,7 +1147,8 @@ void mips_malta_init(MachineState *machine)
FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
65536,
4, 0x0000, 0x0000, 0x0000, 0x0000, be);
4, 0x0000, 0x0000, 0x0000, 0x0000,
TARGET_BIG_ENDIAN);
bios = pflash_cfi01_get_memory(fl);
fl_idx++;
if (kernel_filename) {
@ -1245,7 +1232,7 @@ void mips_malta_init(MachineState *machine)
/* Northbridge */
dev = qdev_new("gt64120");
qdev_prop_set_bit(dev, "cpu-little-endian", !be);
qdev_prop_set_bit(dev, "cpu-little-endian", !TARGET_BIG_ENDIAN);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
pci_bus_map_irqs(pci_bus, malta_pci_slot_get_pirq);

9
hw/mips/mipssim.c
View File

@ -62,18 +62,11 @@ static uint64_t load_kernel(void)
uint64_t entry, kernel_high, initrd_size;
long kernel_size;
ram_addr_t initrd_offset;
int big_endian;
#if TARGET_BIG_ENDIAN
big_endian = 1;
#else
big_endian = 0;
#endif
kernel_size = load_elf(loaderparams.kernel_filename, NULL,
cpu_mips_kseg0_to_phys, NULL,
&entry, NULL,
&kernel_high, NULL, big_endian,
&kernel_high, NULL, TARGET_BIG_ENDIAN,
EM_MIPS, 1, 0);
if (kernel_size < 0) {
error_report("could not load kernel '%s': %s",

5
hw/net/vmxnet3.c
View File

@ -1439,7 +1439,10 @@ static void vmxnet3_activate_device(VMXNET3State *s)
vmxnet3_setup_rx_filtering(s);
/* Cache fields from shared memory */
s->mtu = VMXNET3_READ_DRV_SHARED32(d, s->drv_shmem, devRead.misc.mtu);
assert(VMXNET3_MIN_MTU <= s->mtu && s->mtu <= VMXNET3_MAX_MTU);
if (s->mtu < VMXNET3_MIN_MTU || s->mtu > VMXNET3_MAX_MTU) {
qemu_log_mask(LOG_GUEST_ERROR, "vmxnet3: Bad MTU size: %u\n", s->mtu);
return;
}
VMW_CFPRN("MTU is %u", s->mtu);
s->max_rx_frags =

9
hw/nios2/boot.c
View File

@ -148,16 +148,11 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
if (kernel_filename) {
int kernel_size, fdt_size;
uint64_t entry, high;
int big_endian = 0;
#if TARGET_BIG_ENDIAN
big_endian = 1;
#endif
/* Boots a kernel elf binary. */
kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
&entry, NULL, &high, NULL,
big_endian, EM_ALTERA_NIOS2, 0, 0);
TARGET_BIG_ENDIAN, EM_ALTERA_NIOS2, 0, 0);
if ((uint32_t)entry == 0xc0000000) {
/*
* The Nios II processor reference guide documents that the
@ -168,7 +163,7 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base,
kernel_size = load_elf(kernel_filename, NULL,
translate_kernel_address, NULL,
&entry, NULL, NULL, NULL,
big_endian, EM_ALTERA_NIOS2, 0, 0);
TARGET_BIG_ENDIAN, EM_ALTERA_NIOS2, 0, 0);
boot_info.bootstrap_pc = ddr_base + 0xc0000000 +
(entry & 0x07ffffff);
} else {

2
hw/nubus/trace-events
View File

@ -1,4 +1,4 @@
# See docs/devel/tracing.txt for syntax documentation.
# See docs/devel/tracing.rst for syntax documentation.
# nubus-bus.c
nubus_slot_read(uint64_t addr, int size) "reading unassigned addr 0x%"PRIx64 " size %d"

2
hw/ppc/spapr_iommu.c
View File

@ -248,7 +248,7 @@ static int spapr_tce_table_post_load(void *opaque, int version_id)
memcpy(tcet->table, tcet->mig_table,
tcet->nb_table * sizeof(tcet->table[0]));
free(tcet->mig_table);
g_free(tcet->mig_table);
tcet->mig_table = NULL;
}

2
hw/riscv/microchip_pfsoc.c
View File

@ -659,7 +659,7 @@ static void microchip_icicle_kit_machine_class_init(ObjectClass *oc, void *data)
mc->default_ram_id = "microchip.icicle.kit.ram";
/*
* Map 513 MiB high memory, the mimimum required high memory size, because
* Map 513 MiB high memory, the minimum required high memory size, because
* HSS will do memory test against the high memory address range regardless
* of physical memory installed.
*

4
hw/riscv/virt.c
View File

@ -66,13 +66,13 @@
#define VIRT_IMSIC_GROUP_MAX_SIZE (1U << IMSIC_MMIO_GROUP_MIN_SHIFT)
#if VIRT_IMSIC_GROUP_MAX_SIZE < \
IMSIC_GROUP_SIZE(VIRT_CPUS_MAX_BITS, VIRT_IRQCHIP_MAX_GUESTS_BITS)
#error "Can't accomodate single IMSIC group in address space"
#error "Can't accommodate single IMSIC group in address space"
#endif
#define VIRT_IMSIC_MAX_SIZE (VIRT_SOCKETS_MAX * \
VIRT_IMSIC_GROUP_MAX_SIZE)
#if 0x4000000 < VIRT_IMSIC_MAX_SIZE
#error "Can't accomodate all IMSIC groups in address space"
#error "Can't accommodate all IMSIC groups in address space"
#endif
static const MemMapEntry virt_memmap[] = {

2
hw/xen/xen_pvdev.c
View File

@ -89,7 +89,7 @@ char *xenstore_read_str(const char *base, const char *node)
str = qemu_xen_xs_read(xenstore, 0, abspath, &len);
if (str != NULL) {
/* move to qemu-allocated memory to make sure
* callers can savely g_free() stuff. */
* callers can safely g_free() stuff. */
ret = g_strdup(str);
free(str);
}

7
hw/xtensa/sim.c
View File

@ -96,16 +96,11 @@ XtensaCPU *xtensa_sim_common_init(MachineState *machine)
void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine)
{
const char *kernel_filename = machine->kernel_filename;
#if TARGET_BIG_ENDIAN
int big_endian = true;
#else
int big_endian = false;
#endif
if (kernel_filename) {
uint64_t elf_entry;
int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
&elf_entry, NULL, NULL, NULL, big_endian,
&elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN,
EM_XTENSA, 0, 0);
if (success > 0) {

10
hw/xtensa/xtfpga.c
View File

@ -219,11 +219,6 @@ static const MemoryRegionOps xtfpga_io_ops = {
static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
{
#if TARGET_BIG_ENDIAN
int be = 1;
#else
int be = 0;
#endif
MemoryRegion *system_memory = get_system_memory();
XtensaCPU *cpu = NULL;
CPUXtensaState *env = NULL;
@ -316,7 +311,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
if (dinfo) {
flash = xtfpga_flash_init(system_io, board, dinfo, be);
flash = xtfpga_flash_init(system_io, board, dinfo, TARGET_BIG_ENDIAN);
}
/* Use presence of kernel file name as 'boot from SRAM' switch. */
@ -412,7 +407,8 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
uint64_t elf_entry;
int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu,
&elf_entry, NULL, NULL, NULL, be, EM_XTENSA, 0, 0);
&elf_entry, NULL, NULL, NULL, TARGET_BIG_ENDIAN,
EM_XTENSA, 0, 0);
if (success > 0) {
entry_point = elf_entry;
} else {

2
include/block/block_int-common.h
View File

@ -418,7 +418,7 @@ struct BlockDriver {
/**
* Called to inform the driver that the set of cumulative set of used
* permissions for @bs has changed to @perm, and the set of sharable
* permissions for @bs has changed to @perm, and the set of shareable
* permission to @shared. The driver can use this to propagate changes to
* its children (i.e. request permissions only if a parent actually needs
* them).

4
include/chardev/char-fe.h
View File

@ -78,7 +78,7 @@ bool qemu_chr_fe_backend_open(CharBackend *be);
* is not supported and will not be attempted
* @opaque: an opaque pointer for the callbacks
* @context: a main loop context or NULL for the default
* @set_open: whether to call qemu_chr_fe_set_open() implicitely when
* @set_open: whether to call qemu_chr_fe_set_open() implicitly when
* any of the handler is non-NULL
* @sync_state: whether to issue event callback with updated state
*
@ -138,7 +138,7 @@ void qemu_chr_fe_disconnect(CharBackend *be);
/**
* qemu_chr_fe_wait_connected:
*
* Wait for characted backend to be connected, return < 0 on error or
* Wait for character backend to be connected, return < 0 on error or
* if no associated Chardev.
*/
int qemu_chr_fe_wait_connected(CharBackend *be, Error **errp);

2
include/crypto/akcipher.h
View File

@ -30,7 +30,7 @@ typedef struct QCryptoAkCipher QCryptoAkCipher;
* qcrypto_akcipher_supports:
* @opts: the asymmetric key algorithm and related options
*
* Determine if asymmetric key cipher decribed with @opts is
* Determine if asymmetric key cipher described with @opts is
* supported by the current configured build
*
* Returns: true if it is supported, false otherwise.

4
include/crypto/ivgen.h
View File

@ -32,7 +32,7 @@
* sector.
*
* <example>
* <title>Encrypting block data with initialiation vectors</title>
* <title>Encrypting block data with initialization vectors</title>
* <programlisting>
* uint8_t *data = ....data to encrypt...
* size_t ndata = XXX;
@ -147,7 +147,7 @@ QCryptoIVGen *qcrypto_ivgen_new(QCryptoIVGenAlgorithm alg,
* @niv: the number of bytes in @iv
* @errp: pointer to a NULL-initialized error object
*
* Calculate a new initialiation vector for the data
* Calculate a new initialization vector for the data
* to be stored in sector @sector. The IV will be
* written into the buffer @iv of size @niv.
*

2
include/exec/translator.h
View File

@ -159,7 +159,7 @@ bool translator_use_goto_tb(DisasContextBase *db, vaddr dest);
* translator_io_start
* @db: Disassembly context
*
* If icount is enabled, set cpu->can_to_io, adjust db->is_jmp to
* If icount is enabled, set cpu->can_do_io, adjust db->is_jmp to
* DISAS_TOO_MANY if it is still DISAS_NEXT, and return true.
* Otherwise return false.
*/

2
include/hw/acpi/aml-build.h
View File

@ -277,7 +277,7 @@ void free_aml_allocator(void);
* @child: element that is copied into @parent_ctx context
*
* Joins Aml elements together and helps to construct AML tables
* Examle of usage:
* Example of usage:
* Aml *table = aml_def_block("SSDT", ...);
* Aml *sb = aml_scope("\\_SB");
* Aml *dev = aml_device("PCI0");

2
include/hw/acpi/pc-hotplug.h
View File

@ -13,7 +13,7 @@
#define PC_HOTPLUG_H
/*
* ONLY DEFINEs are permited in this file since it's shared
* ONLY DEFINEs are permitted in this file since it's shared
* between C and ASL code.
*/

2
include/hw/acpi/vmgenid.h
View File

@ -13,7 +13,7 @@
#define VMGENID_FW_CFG_SIZE 4096 /* Occupy a page of memory */
#define VMGENID_GUID_OFFSET 40 /* allow space for
* OVMF SDT Header Probe Supressor
* OVMF SDT Header Probe Suppressor
*/
OBJECT_DECLARE_SIMPLE_TYPE(VmGenIdState, VMGENID)

6
include/hw/boards.h
View File

@ -158,7 +158,7 @@ typedef struct {
* any actions to be performed by hotplug handler.
* @cpu_index_to_instance_props:
* used to provide @cpu_index to socket/core/thread number mapping, allowing
* legacy code to perform maping from cpu_index to topology properties
* legacy code to perform mapping from cpu_index to topology properties
* Returns: tuple of socket/core/thread ids given cpu_index belongs to.
* used to provide @cpu_index to socket number mapping, allowing
* a machine to group CPU threads belonging to the same socket/package
@ -211,10 +211,10 @@ typedef struct {
* the rejection. If the hook is not provided, all hotplug will be
* allowed.
* @default_ram_id:
* Specifies inital RAM MemoryRegion name to be used for default backend
* Specifies initial RAM MemoryRegion name to be used for default backend
* creation if user explicitly hasn't specified backend with "memory-backend"
* property.
* It also will be used as a way to optin into "-m" option support.
* It also will be used as a way to option into "-m" option support.
* If it's not set by board, '-m' will be ignored and generic code will
* not create default RAM MemoryRegion.
* @fixup_ram_size:

2
include/hw/char/avr_usart.h
View File

@ -34,7 +34,7 @@
#define USART_BRRH 0x05
#define USART_BRRL 0x04
/* Relevant bits in regiters. */
/* Relevant bits in registers. */
#define USART_CSRA_RXC (1 << 7)
#define USART_CSRA_TXC (1 << 6)
#define USART_CSRA_DRE (1 << 5)

2
include/hw/clock.h
View File

@ -204,7 +204,7 @@ static inline bool clock_set_ns(Clock *clk, unsigned ns)
* Propagate the clock period that has been previously configured using
* @clock_set(). This will update recursively all connected clocks.
* It is an error to call this function on a clock which has a source.
* Note: this function must not be called during device inititialization
* Note: this function must not be called during device initialization
* or migration.
*/
void clock_propagate(Clock *clk);

2
include/hw/cxl/cxl_device.h
View File

@ -208,7 +208,7 @@ void cxl_event_set_status(CXLDeviceState *cxl_dstate, CXLEventLogType log_type,
* > is the maximum access size allowed for these registers. If this rule is not
* > followed, the behavior is undefined
*
* CXL 2.0 Errata F4 states futher that the layouts in the specification are
* CXL 2.0 Errata F4 states further that the layouts in the specification are
* shown as greater than 128 bits, but implementations are expected to
* use any size of access up to 64 bits.
*

2
include/hw/hyperv/vmbus.h
View File

@ -51,7 +51,7 @@ struct VMBusDeviceClass {
uint16_t channel_flags;
uint16_t mmio_size_mb;
/* Extentions to standard device callbacks */
/* Extensions to standard device callbacks */
void (*vmdev_realize)(VMBusDevice *vdev, Error **errp);
void (*vmdev_unrealize)(VMBusDevice *vdev);
void (*vmdev_reset)(VMBusDevice *vdev);

2
include/hw/misc/macio/pmu.h
View File

@ -76,7 +76,7 @@
#define PMU_INT_WAITING_CHARGER 0x01 /* ??? */
#define PMU_INT_AUTO_SRQ_POLL 0x02 /* ??? */
/* Bits in the environement message (either obtained via PMU_GET_COVER,
/* Bits in the environment message (either obtained via PMU_GET_COVER,
* or via PMU_INT_ENVIRONMENT on core99 */
#define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */

2
include/hw/net/mii.h
View File

@ -71,7 +71,7 @@
#define MII_BMSR_JABBER (1 << 1) /* Jabber detected */
#define MII_BMSR_EXTCAP (1 << 0) /* Ext-reg capability */
#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymetric pause */
#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymmetric pause */
#define MII_ANAR_PAUSE (1 << 10) /* Try for pause */
#define MII_ANAR_TXFD (1 << 8)
#define MII_ANAR_TX (1 << 7)

2
include/hw/pci-host/dino.h
View File

@ -1,5 +1,5 @@
/*
* HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines
* HP-PARISC Dino PCI chipset emulation, as in B160L and similar machines
*
* (C) 2017-2019 by Helge Deller <deller@gmx.de>
*

2
include/hw/pci/pcie_aer.h
View File

@ -40,7 +40,7 @@ struct PCIEAERLog {
* The specified value will be clipped down to PCIE_AER_LOG_MAX_LIMIT
* to avoid unreasonable memory usage.
* I bet that 128 log size would be big enough, otherwise too many errors
* for system to function normaly. But could consecutive errors occur?
* for system to function normally. But could consecutive errors occur?
*/
#define PCIE_AER_LOG_MAX_DEFAULT 8
#define PCIE_AER_LOG_MAX_LIMIT 128

2
include/hw/riscv/riscv_hart.h
View File

@ -3,7 +3,7 @@
*
* Copyright (c) 2017 SiFive, Inc.
*
* Holds the state of a heterogenous array of RISC-V harts
* Holds the state of a heterogeneous array of RISC-V harts
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,

2
include/hw/ssi/xilinx_spips.h
View File

@ -104,7 +104,7 @@ struct XlnxZynqMPQSPIPS {
uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
/* GQSPI has seperate tx/rx fifos */
/* GQSPI has separate tx/rx fifos */
Fifo8 rx_fifo_g;
Fifo8 tx_fifo_g;
Fifo32 fifo_g;

2
include/hw/virtio/virtio-net.h
View File

@ -109,7 +109,7 @@ typedef struct VirtioNetRscSeg {
size_t size;
uint16_t packets;
uint16_t dup_ack;
bool is_coalesced; /* need recal ipv4 header checksum, mark here */
bool is_coalesced; /* need recall ipv4 header checksum, mark here */
VirtioNetRscUnit unit;
NetClientState *nc;
} VirtioNetRscSeg;

2
include/sysemu/cryptodev-vhost.h
View File

@ -79,7 +79,7 @@ cryptodev_vhost_init(
* cryptodev_vhost_cleanup:
* @crypto: the cryptodev backend common vhost object
*
* Clean the resouce associated with @crypto that realizaed
* Clean the resource associated with @crypto that realizaed
* by cryptodev_vhost_init()
*
*/

6
include/sysemu/cryptodev.h
View File

@ -339,7 +339,7 @@ void cryptodev_backend_free_client(
* @backend: the cryptodev backend object
* @errp: pointer to a NULL-initialized error object
*
* Clean the resouce associated with @backend that realizaed
* Clean the resource associated with @backend that realizaed
* by the specific backend's init() callback
*/
void cryptodev_backend_cleanup(
@ -407,7 +407,7 @@ int cryptodev_backend_crypto_operation(
/**
* cryptodev_backend_set_used:
* @backend: the cryptodev backend object
* @used: ture or false
* @used: true or false
*
* Set the cryptodev backend is used by virtio-crypto or not
*/
@ -427,7 +427,7 @@ bool cryptodev_backend_is_used(CryptoDevBackend *backend);
/**
* cryptodev_backend_set_ready:
* @backend: the cryptodev backend object
* @ready: ture or false
* @ready: true or false
*
* Set the cryptodev backend is ready or not, which is called
* by the children of the cryptodev banckend interface.

2
include/sysemu/iothread.h
View File

@ -59,7 +59,7 @@ void iothread_stop(IOThread *iothread);
void iothread_destroy(IOThread *iothread);
/*
* Returns true if executing withing IOThread context,
* Returns true if executing within IOThread context,
* false otherwise.
*/
bool qemu_in_iothread(void);

2
include/sysemu/stats.h
View File

@ -34,7 +34,7 @@ void add_stats_schema(StatsSchemaList **, StatsProvider, StatsTarget,
StatsSchemaValueList *);
/*
* True if a string matches the filter passed to the stats_fn callabck,
* True if a string matches the filter passed to the stats_fn callback,
* false otherwise.
*
* Note that an empty list means no filtering, i.e. all strings will

2
include/sysemu/tpm_backend.h
View File

@ -115,7 +115,7 @@ int tpm_backend_startup_tpm(TPMBackend *s, size_t buffersize);
/**
* tpm_backend_had_startup_error:
* @s: the backend to query for a statup error
* @s: the backend to query for a startup error
*
* Check whether the backend had an error during startup. Returns
* false if no error occurred and the backend can be used, true

2
nbd/client-connection.c
View File

@ -196,7 +196,7 @@ static void *connect_thread_func(void *opaque)
* conn->updated_info will finally be returned to the user. Clear the
* pointers to our internally allocated strings, which are IN parameters
* of nbd_receive_negotiate() and therefore nbd_connect(). Caller
* shoudn't be interested in these fields.
* shouldn't be interested in these fields.
*/
conn->updated_info.x_dirty_bitmap = NULL;
conn->updated_info.name = NULL;

4
net/checksum.c
View File

@ -74,7 +74,7 @@ void net_checksum_calculate(uint8_t *data, int length, int csum_flag)
return;
}
/* Handle the optionnal VLAN headers */
/* Handle the optional VLAN headers */
switch (lduw_be_p(&PKT_GET_ETH_HDR(data)->h_proto)) {
case ETH_P_VLAN:
mac_hdr_len = sizeof(struct eth_header) +
@ -96,7 +96,7 @@ void net_checksum_calculate(uint8_t *data, int length, int csum_flag)
length -= mac_hdr_len;
/* Now check we have an IP header (with an optionnal VLAN header) */
/* Now check we have an IP header (with an optional VLAN header) */
if (length < sizeof(struct ip_header)) {
return;
}

6
net/filter.c
View File

@ -91,8 +91,8 @@ ssize_t qemu_netfilter_pass_to_next(NetClientState *sender,
next = netfilter_next(nf, direction);
while (next) {
/*
* if qemu_netfilter_pass_to_next been called, means that
* the packet has been hold by filter and has already retured size
* if qemu_netfilter_pass_to_next has been called, it means that
* the packet was held by a filter and has already returned size
* to the sender, so sent_cb shouldn't be called later, just
* pass NULL to next.
*/
@ -106,7 +106,7 @@ ssize_t qemu_netfilter_pass_to_next(NetClientState *sender,
/*
* We have gone through all filters, pass it to receiver.
* Do the valid check again incase sender or receiver been
* Do the valid check again in case sender or receiver been
* deleted while we go through filters.
*/
if (sender && sender->peer) {

8
net/vhost-vdpa.c
View File

@ -821,7 +821,7 @@ static int vhost_vdpa_net_load_rx(VhostVDPAState *s,
* According to virtio_net_reset(), device turns promiscuous mode
* on by default.
*
* Addtionally, according to VirtIO standard, "Since there are
* Additionally, according to VirtIO standard, "Since there are
* no guarantees, it can use a hash filter or silently switch to
* allmulti or promiscuous mode if it is given too many addresses.".
* QEMU marks `n->mac_table.uni_overflow` if guest sets too many
@ -1130,7 +1130,7 @@ static int vhost_vdpa_net_excessive_mac_filter_cvq_add(VhostVDPAState *s,
* Pack the non-multicast MAC addresses part for fake CVQ command.
*
* According to virtio_net_handle_mac(), QEMU doesn't verify the MAC
* addresses provieded in CVQ command. Therefore, only the entries
* addresses provided in CVQ command. Therefore, only the entries
* field need to be prepared in the CVQ command.
*/
mac_ptr = out->iov_base + cursor;
@ -1141,7 +1141,7 @@ static int vhost_vdpa_net_excessive_mac_filter_cvq_add(VhostVDPAState *s,
* Pack the multicast MAC addresses part for fake CVQ command.
*
* According to virtio_net_handle_mac(), QEMU doesn't verify the MAC
* addresses provieded in CVQ command. Therefore, only the entries
* addresses provided in CVQ command. Therefore, only the entries
* field need to be prepared in the CVQ command.
*/
mac_ptr = out->iov_base + cursor;
@ -1202,7 +1202,7 @@ static int vhost_vdpa_net_handle_ctrl_avail(VhostShadowVirtqueue *svq,
* rejects the flawed CVQ command.
*
* Therefore, QEMU must handle this situation instead of sending
* the CVQ command direclty.
* the CVQ command directly.
*/
dev_written = vhost_vdpa_net_excessive_mac_filter_cvq_add(s, elem,
&out);

20
qemu-options.hx
View File

@ -1209,10 +1209,10 @@ SRST
ERST
DEF("hda", HAS_ARG, QEMU_OPTION_hda,
"-hda/-hdb file use 'file' as IDE hard disk 0/1 image\n", QEMU_ARCH_ALL)
"-hda/-hdb file use 'file' as hard disk 0/1 image\n", QEMU_ARCH_ALL)
DEF("hdb", HAS_ARG, QEMU_OPTION_hdb, "", QEMU_ARCH_ALL)
DEF("hdc", HAS_ARG, QEMU_OPTION_hdc,
"-hdc/-hdd file use 'file' as IDE hard disk 2/3 image\n", QEMU_ARCH_ALL)
"-hdc/-hdd file use 'file' as hard disk 2/3 image\n", QEMU_ARCH_ALL)
DEF("hdd", HAS_ARG, QEMU_OPTION_hdd, "", QEMU_ARCH_ALL)
SRST
``-hda file``
@ -1222,18 +1222,22 @@ SRST
``-hdc file``
\
``-hdd file``
Use file as hard disk 0, 1, 2 or 3 image (see the :ref:`disk images`
chapter in the System Emulation Users Guide).
Use file as hard disk 0, 1, 2 or 3 image on the default bus of the
emulated machine (this is for example the IDE bus on most x86 machines,
but it can also be SCSI, virtio or something else on other target
architectures). See also the :ref:`disk images` chapter in the System
Emulation Users Guide.
ERST
DEF("cdrom", HAS_ARG, QEMU_OPTION_cdrom,
"-cdrom file use 'file' as IDE cdrom image (cdrom is ide1 master)\n",
"-cdrom file use 'file' as CD-ROM image\n",
QEMU_ARCH_ALL)
SRST
``-cdrom file``
Use file as CD-ROM image (you cannot use ``-hdc`` and ``-cdrom`` at
the same time). You can use the host CD-ROM by using ``/dev/cdrom``
as filename.
Use file as CD-ROM image on the default bus of the emulated machine
(which is IDE1 master on x86, so you cannot use ``-hdc`` and ``-cdrom``
at the same time there). On systems that support it, you can use the
host CD-ROM by using ``/dev/cdrom`` as filename.
ERST
DEF("blockdev", HAS_ARG, QEMU_OPTION_blockdev,

2
qga/channel-posix.c
View File

@ -152,7 +152,7 @@ static gboolean ga_channel_open(GAChannel *c, const gchar *path,
#ifdef __FreeBSD__
/*
* In the default state channel sends echo of every command to a
* client. The client programm doesn't expect this and raises an
* client. The client program doesn't expect this and raises an
* error. Suppress echo by resetting ECHO terminal flag.
*/
struct termios tio;

2
qga/commands-posix-ssh.c
View File

@ -382,7 +382,7 @@ test_add_keys(void)
&err);
g_assert(err == NULL);
/* key2 came first, and should'nt be duplicated */
/* key2 came first, and shouldn't be duplicated */
test_authorized_keys_equal("algo key2 comments\n"
"algo key1 comments");
}

2
qga/commands-posix.c
View File

@ -3249,7 +3249,7 @@ GuestUserList *qmp_guest_get_users(Error **errp)
#endif
/* Replace escaped special characters with theire real values. The replacement
/* Replace escaped special characters with their real values. The replacement
* is done in place -- returned value is in the original string.
*/
static void ga_osrelease_replace_special(gchar *value)

4
qga/commands-win32.c
View File

@ -487,7 +487,7 @@ static GuestDiskBusType win2qemu[] = {
[BusTypeVirtual] = GUEST_DISK_BUS_TYPE_VIRTUAL,
[BusTypeFileBackedVirtual] = GUEST_DISK_BUS_TYPE_FILE_BACKED_VIRTUAL,
/*
* BusTypeSpaces currently is not suported
* BusTypeSpaces currently is not supported
*/
[BusTypeSpaces] = GUEST_DISK_BUS_TYPE_UNKNOWN,
[BusTypeNvme] = GUEST_DISK_BUS_TYPE_NVME,
@ -2259,7 +2259,7 @@ static char *ga_get_win_product_name(Error **errp)
}
}
if (err != ERROR_SUCCESS) {
error_setg_win32(errp, err, "failed to retrive ProductName");
error_setg_win32(errp, err, "failed to retrieve ProductName");
goto fail;
}

2
qga/main.c
View File

@ -1333,7 +1333,7 @@ static bool check_is_frozen(GAState *s)
/* check if a previous instance of qemu-ga exited with filesystems' state
* marked as frozen. this could be a stale value (a non-qemu-ga process
* or reboot may have since unfrozen them), but better to require an
* uneeded unfreeze than to risk hanging on start-up
* unneeded unfreeze than to risk hanging on start-up
*/
struct stat st;
if (stat(s->state_filepath_isfrozen, &st) == -1) {

4
qga/vss-win32/install.cpp
View File

@ -343,7 +343,7 @@ STDAPI COMRegister(void)
_bstr_t(dllPath), _bstr_t(tlbPath),
_bstr_t("")));
/* Setup roles of the applicaion */
/* Setup roles of the application */
chk(getNameByStringSID(administratorsGroupSID, buffer, &bufferLen));
chk(pApps->GetCollection(_bstr_t(L"Roles"), key,
@ -439,7 +439,7 @@ STDAPI DllRegisterServer(void)
goto out;
}
/* Add this module to registery */
/* Add this module to registry */
sprintf(key, "CLSID\\%s", g_szClsid);
if (!CreateRegistryKey(key, NULL, g_szClsid)) {

2
scripts/checkpatch.pl
View File

@ -1621,7 +1621,7 @@ sub process {
my $hex =
qr/%[-+ *.0-9]*([hljztL]|ll|hh)?(x|X|"\s*PRI[xX][^"]*"?)/;
# don't consider groups splitted by [.:/ ], like 2A.20:12ab
# don't consider groups split by [.:/ ], like 2A.20:12ab
my $tmpline = $rawline;
$tmpline =~ s/($hex[.:\/ ])+$hex//g;

2
scripts/ci/gitlab-pipeline-status
View File

@ -28,7 +28,7 @@ class CommunicationFailure(Exception):
class NoPipelineFound(Exception):
"""Communication is successfull but pipeline is not found."""
"""Communication is successful but pipeline is not found."""
def get_local_branch_commit(branch):

2
scripts/codeconverter/codeconverter/qom_macros.py
View File

@ -142,7 +142,7 @@ class FullStructTypedefMatch(TypedefMatch):
return name
def strip_typedef(self) -> Patch:
"""generate patch that will strip typedef from the struct declartion
"""generate patch that will strip typedef from the struct declaration
The caller is responsible for readding the typedef somewhere else.
"""

8
scripts/oss-fuzz/minimize_qtest_trace.py
View File

@ -2,7 +2,7 @@
# -*- coding: utf-8 -*-
"""
This takes a crashing qtest trace and tries to remove superflous operations
This takes a crashing qtest trace and tries to remove superfluous operations
"""
import sys
@ -38,7 +38,7 @@ crash by setting CRASH_TOKEN=
Options:
-M1: enable a loop around the remove minimizer, which may help decrease some
timing dependant instructions. Off by default.
timing dependent instructions. Off by default.
-M2: try setting bits in operand of write/out to zero. Off by default.
""".format((sys.argv[0])))
@ -177,7 +177,7 @@ def remove_lines(newtrace, outpath):
# it into two separate write commands. If splitting the data operand
# from length/2^n bytes to the left does not work, try to move the pivot
# to the right side, then add one to n, until length/2^n == 0. The idea
# is to prune unneccessary bytes from long writes, while accommodating
# is to prune unnecessary bytes from long writes, while accommodating
# arbitrary MemoryRegion access sizes and alignments.
# This algorithm will fail under some rare situations.
@ -292,7 +292,7 @@ def minimize_trace(inpath, outpath):
old_len = len(newtrace) + 1
while(old_len > len(newtrace)):
old_len = len(newtrace)
print("trace lenth = ", old_len)
print("trace length = ", old_len)
remove_lines(newtrace, outpath)
if not M1 and not M2:
break

2
scripts/performance/topN_callgrind.py
View File

@ -4,7 +4,7 @@
# Syntax:
# topN_callgrind.py [-h] [-n] <number of displayed top functions> -- \
# <qemu executable> [<qemu executable options>] \
# <target executable> [<target execurable options>]
# <target executable> [<target executable options>]
#
# [-h] - Print the script arguments help message.
# [-n] - Specify the number of top functions to print.

2
scripts/performance/topN_perf.py
View File

@ -4,7 +4,7 @@
# Syntax:
# topN_perf.py [-h] [-n] <number of displayed top functions> -- \
# <qemu executable> [<qemu executable options>] \
# <target executable> [<target execurable options>]
# <target executable> [<target executable options>]
#
# [-h] - Print the script arguments help message.
# [-n] - Specify the number of top functions to print.

2
scripts/qapi/gen.py
View File

@ -81,7 +81,7 @@ class QAPIGen:
if odir:
os.makedirs(odir, exist_ok=True)
# use os.open for O_CREAT to create and read a non-existant file
# use os.open for O_CREAT to create and read a non-existent file
fd = os.open(pathname, os.O_RDWR | os.O_CREAT, 0o666)
with os.fdopen(fd, 'r+', encoding='utf-8') as fp:
text = self.get_content()

2
scripts/replay-dump.py
View File

@ -111,7 +111,7 @@ def print_event(eid, name, string=None, event_count=None):
# Decoders for each event type
def decode_unimp(eid, name, _unused_dumpfile):
"Unimplimented decoder, will trigger exit"
"Unimplemented decoder, will trigger exit"
print("%s not handled - will now stop" % (name))
return False

2
scripts/simplebench/bench_block_job.py
View File

@ -39,7 +39,7 @@ def bench_block_job(cmd, cmd_args, qemu_args):
binary
Returns {'seconds': int} on success and {'error': str} on failure, dict may
contain addional 'vm-log' field. Return value is compatible with
contain additional 'vm-log' field. Return value is compatible with
simplebench lib.
"""

12
target/arm/cpu.h
View File

@ -3208,11 +3208,7 @@ static inline bool bswap_code(bool sctlr_b)
* The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_BIG_ENDIAN=0
* would also end up as a mixed-endian mode with BE code, LE data.
*/
return
#if TARGET_BIG_ENDIAN
1 ^
#endif
sctlr_b;
return TARGET_BIG_ENDIAN ^ sctlr_b;
#else
/* All code access in ARM is little endian, and there are no loaders
* doing swaps that need to be reversed
@ -3224,11 +3220,7 @@ static inline bool bswap_code(bool sctlr_b)
#ifdef CONFIG_USER_ONLY
static inline bool arm_cpu_bswap_data(CPUARMState *env)
{
return
#if TARGET_BIG_ENDIAN
1 ^
#endif
arm_cpu_data_is_big_endian(env);
return TARGET_BIG_ENDIAN ^ arm_cpu_data_is_big_endian(env);
}
#endif

2
target/hexagon/README
View File

@ -239,7 +239,7 @@ helper_funcs_generated.c.inc. There are also several helpers used for debugging
VLIW packet semantics differ from serial semantics in that all input operands
are read, then the operations are performed, then all the results are written.
For exmaple, this packet performs a swap of registers r0 and r1
For example, this packet performs a swap of registers r0 and r1
{ r0 = r1; r1 = r0 }
Note that the result is different if the instructions are executed serially.

2
target/hexagon/fma_emu.c
View File

@ -415,7 +415,7 @@ static SUFFIX accum_round_##SUFFIX(Accum a, float_status * fp_status) \
* We want to normalize left until we have a leading one in bit 24 \
* Theoretically, we only need to shift a maximum of one to the left if we \
* shifted out lots of bits from B, or if we had no shift / 1 shift sticky \
* shoudl be 0 \
* should be 0 \
*/ \
while ((int128_getlo(a.mant) & (1ULL << MANTBITS)) == 0) { \
a = accum_norm_left(a); \

2
target/hexagon/idef-parser/README.rst
View File

@ -440,7 +440,7 @@ interested part of the grammar.
Run-time errors can be divided between lexing and parsing errors, lexing errors
are hard to detect, since the ``var`` token will catch everything which is not
catched by other tokens, but easy to fix, because most of the time a simple
caught by other tokens, but easy to fix, because most of the time a simple
regex editing will be enough.
idef-parser features a fancy parsing error reporting scheme, which for each

2
target/hexagon/idef-parser/idef-parser.h
View File

@ -73,7 +73,7 @@ typedef struct HexTmp {
} HexTmp;
/**
* Enum of the possible immediated, an immediate is a value which is known
* Enum of the possible immediate, an immediate is a value which is known
* at tinycode generation time, e.g. an integer value, not a TCGv
*/
enum ImmUnionTag {

6
target/hexagon/idef-parser/parser-helpers.c
View File

@ -459,7 +459,7 @@ static bool try_find_variable(Context *c, YYLTYPE *locp,
return false;
}
/* Calls `try_find_variable` and asserts succcess. */
/* Calls `try_find_variable` and asserts success. */
static void find_variable(Context *c, YYLTYPE *locp,
HexValue *dst,
HexValue *varid)
@ -549,7 +549,7 @@ HexValue gen_bin_cmp(Context *c,
");\n");
break;
default:
fprintf(stderr, "Error in evalutating immediateness!");
fprintf(stderr, "Error in evaluating immediateness!");
abort();
}
return res;
@ -1164,7 +1164,7 @@ void gen_rdeposit_op(Context *c,
{
/*
* Otherwise if the width is not known, we fallback on reimplementing
* desposit in TCG.
* deposit in TCG.
*/
HexValue begin_m = *begin;
HexValue value_m = *value;

8
target/hexagon/imported/alu.idef
View File

@ -292,16 +292,16 @@ Q6INSN(A4_combineii,"Rdd32=combine(#s8,#U6)",ATTRIBS(),"Set two small immediates
Q6INSN(A2_combine_hh,"Rd32=combine(Rt.H32,Rs.H32)",ATTRIBS(),
"Combine two halfs into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(1,RsV);})
"Combine two halves into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(1,RsV);})
Q6INSN(A2_combine_hl,"Rd32=combine(Rt.H32,Rs.L32)",ATTRIBS(),
"Combine two halfs into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(0,RsV);})
"Combine two halves into a register", {RdV = (fGETUHALF(1,RtV)<<16) | fGETUHALF(0,RsV);})
Q6INSN(A2_combine_lh,"Rd32=combine(Rt.L32,Rs.H32)",ATTRIBS(),
"Combine two halfs into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(1,RsV);})
"Combine two halves into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(1,RsV);})
Q6INSN(A2_combine_ll,"Rd32=combine(Rt.L32,Rs.L32)",ATTRIBS(),
"Combine two halfs into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(0,RsV);})
"Combine two halves into a register", {RdV = (fGETUHALF(0,RtV)<<16) | fGETUHALF(0,RsV);})
Q6INSN(A2_tfril,"Rx.L32=#u16",ATTRIBS(),
"Set low 16-bits, leave upper 16 unchanged",{ fSETHALF(0,RxV,uiV);})

2
target/hexagon/imported/macros.def
View File

@ -902,7 +902,7 @@ DEF_MACRO(
)
DEF_MACRO(
fEA_GPI, /* Calculate EA with Global Poitner + Immediate */
fEA_GPI, /* Calculate EA with Global Pointer + Immediate */
do { EA=fREAD_GP()+IMM; fGP_DOCHKPAGECROSS(fREAD_GP(),EA); } while (0),
()
)

10
target/hexagon/imported/mmvec/ext.idef
View File

@ -17,7 +17,7 @@
/******************************************************************************
*
* HOYA: MULTI MEDIA INSTRUCITONS
* HOYA: MULTI MEDIA INSTRUCTIONS
*
******************************************************************************/
@ -295,7 +295,7 @@ MMVEC_COND_EACH_EA(vS32Ub,"Unaligned Vector Store",ATTRIBS(ATTR_VMEMU,A_STORE,A_
MMVEC_EACH_EA(vS32b_new,"Aligned Vector Store New",ATTRIBS(ATTR_VMEM,A_STORE,A_CVI_NEW,A_DOTNEWVALUE,A_RESTRICT_SLOT0ONLY),,"vmem","=Os8.new",fSTOREMMV(EA,fNEWVREG(OsN)))
// V65 store relase, zero byte store
// V65 store release, zero byte store
MMVEC_EACH_EA(vS32b_srls,"Aligned Vector Scatter Release",ATTRIBS(ATTR_VMEM,A_STORE,A_CVI_SCATTER_RELEASE,A_CVI_NEW,A_RESTRICT_SLOT0ONLY),,"vmem",":scatter_release",fSTORERELEASE(EA,0))
@ -2045,11 +2045,11 @@ VxV.uw[0] = RtV;)
ITERATOR_INSN_MPY_SLOT_LATE(32,lvsplatw, "Vd32=vsplat(Rt32)", "Replicates scalar accross words in vector", VdV.uw[i] = RtV)
ITERATOR_INSN_MPY_SLOT_LATE(32,lvsplatw, "Vd32=vsplat(Rt32)", "Replicates scalar across words in vector", VdV.uw[i] = RtV)
ITERATOR_INSN_MPY_SLOT_LATE(16,lvsplath, "Vd32.h=vsplat(Rt32)", "Replicates scalar accross halves in vector", VdV.uh[i] = RtV)
ITERATOR_INSN_MPY_SLOT_LATE(16,lvsplath, "Vd32.h=vsplat(Rt32)", "Replicates scalar across halves in vector", VdV.uh[i] = RtV)
ITERATOR_INSN_MPY_SLOT_LATE(8,lvsplatb, "Vd32.b=vsplat(Rt32)", "Replicates scalar accross bytes in vector", VdV.ub[i] = RtV)
ITERATOR_INSN_MPY_SLOT_LATE(8,lvsplatb, "Vd32.b=vsplat(Rt32)", "Replicates scalar across bytes in vector", VdV.ub[i] = RtV)
ITERATOR_INSN_ANY_SLOT(32,vassign,"Vd32=Vu32","Copy a vector",VdV.w[i]=VuV.w[i])

2
target/ppc/translate.c
View File

@ -7158,7 +7158,7 @@ static int test_opcode_table(opc_handler_t **table, int len)
tmp = test_opcode_table(ind_table(table[i]),
PPC_CPU_INDIRECT_OPCODES_LEN);
if (tmp == 0) {
free(table[i]);
g_free(table[i]);
table[i] = &invalid_handler;
} else {
count++;

Some files were not shown because too many files have changed in this diff Show More