Partially convert float128 conversion ops to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-09-10 20:00:18 +00:00
parent e2ea21b396
commit c5d04e99f3
3 changed files with 19 additions and 20 deletions

View File

@ -115,7 +115,8 @@ F_HELPER_0_0(smuld);
F_HELPER_0_0(dmulq);
DEF_HELPER(float32, helper_fnegs, (float32 src))
F_HELPER_DQ_0_0(ito);
F_HELPER_0_0(itod);
DEF_HELPER(void, helper_fitoq, (int32_t src))
DEF_HELPER(float32, helper_fitos, (int32_t src))
@ -126,13 +127,13 @@ F_HELPER_SDQ_0_0(xto);
#endif
F_HELPER_0_0(dtos);
F_HELPER_0_0(stod);
F_HELPER_0_0(qtos);
F_HELPER_0_0(stoq);
DEF_HELPER(float32, helper_fqtos, (void))
DEF_HELPER(void, helper_fstoq, (float32 src))
F_HELPER_0_0(qtod);
F_HELPER_0_0(dtoq);
DEF_HELPER(int32_t, helper_fstoi, (float32 src))
F_HELPER_0_0(dtoi);
F_HELPER_0_0(qtoi);
DEF_HELPER(int32_t, helper_fqtoi, (void))
#ifdef TARGET_SPARC64
F_HELPER_0_0(stox);
F_HELPER_0_0(dtox);

View File

@ -148,9 +148,9 @@ F_HELPER(ito, d)
DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status);
}
F_HELPER(ito, q)
void helper_fitoq(int32_t src)
{
QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status);
QT0 = int32_to_float128(src, &env->fp_status);
}
#ifdef TARGET_SPARC64
@ -182,14 +182,14 @@ void helper_fstod(void)
DT0 = float32_to_float64(FT1, &env->fp_status);
}
void helper_fqtos(void)
float32 helper_fqtos(void)
{
FT0 = float128_to_float32(QT1, &env->fp_status);
return float128_to_float32(QT1, &env->fp_status);
}
void helper_fstoq(void)
void helper_fstoq(float32 src)
{
QT0 = float32_to_float128(FT1, &env->fp_status);
QT0 = float32_to_float128(src, &env->fp_status);
}
void helper_fqtod(void)
@ -213,9 +213,9 @@ void helper_fdtoi(void)
*((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status);
}
void helper_fqtoi(void)
int32_t helper_fqtoi(void)
{
*((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status);
return float128_to_int32_round_to_zero(QT1, &env->fp_status);
}
#ifdef TARGET_SPARC64

View File

@ -2511,9 +2511,9 @@ static void disas_sparc_insn(DisasContext * dc)
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_op_load_fpr_QT1(QFPREG(rs2));
gen_clear_float_exceptions();
tcg_gen_helper_0_0(helper_fqtos);
tcg_gen_helper_1_0(helper_fqtos, cpu_tmp32);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
gen_op_store_FT0_fpr(rd);
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
case 0xc8:
gen_op_load_fpr_FT1(rs2);
@ -2535,14 +2535,12 @@ static void disas_sparc_insn(DisasContext * dc)
break;
case 0xcc: /* fitoq */
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_op_load_fpr_FT1(rs2);
tcg_gen_helper_0_0(helper_fitoq);
tcg_gen_helper_0_1(helper_fitoq, cpu_fpr[rs2]);
gen_op_store_QT0_fpr(QFPREG(rd));
break;
case 0xcd: /* fstoq */
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_op_load_fpr_FT1(rs2);
tcg_gen_helper_0_0(helper_fstoq);
tcg_gen_helper_0_1(helper_fstoq, cpu_fpr[rs2]);
gen_op_store_QT0_fpr(QFPREG(rd));
break;
case 0xce: /* fdtoq */
@ -2569,9 +2567,9 @@ static void disas_sparc_insn(DisasContext * dc)
CHECK_FPU_FEATURE(dc, FLOAT128);
gen_op_load_fpr_QT1(QFPREG(rs2));
gen_clear_float_exceptions();
tcg_gen_helper_0_0(helper_fqtoi);
tcg_gen_helper_1_0(helper_fqtoi, cpu_tmp32);
tcg_gen_helper_0_0(helper_check_ieee_exceptions);
gen_op_store_FT0_fpr(rd);
tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
break;
#ifdef TARGET_SPARC64
case 0x2: /* V9 fmovd */