Trivial patches branch pull request 20211101 v2
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c55e3370c3
@ -211,10 +211,7 @@ HPPA (PA-RISC) TCG CPUs
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M: Richard Henderson <richard.henderson@linaro.org>
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S: Maintained
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F: target/hppa/
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F: hw/hppa/
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F: disas/hppa.c
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F: hw/net/*i82596*
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F: include/hw/net/lasi_82596.h
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M68K TCG CPUs
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M: Laurent Vivier <laurent@vivier.eu>
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@ -1095,6 +1092,8 @@ R: Helge Deller <deller@gmx.de>
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S: Odd Fixes
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F: configs/devices/hppa-softmmu/default.mak
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F: hw/hppa/
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F: hw/net/*i82596*
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F: include/hw/net/lasi_82596.h
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F: pc-bios/hppa-firmware.img
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M68K Machines
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@ -978,6 +978,9 @@ static char *cpu_slot_to_string(const CPUArchId *cpu)
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g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
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}
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if (cpu->props.has_die_id) {
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if (s->len) {
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g_string_append_printf(s, ", ");
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}
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g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
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}
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if (cpu->props.has_core_id) {
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@ -96,7 +96,7 @@ typedef enum {
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LASIPS2_STATUS_CLKSHD = 0x80,
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} lasips2_status_reg_t;
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static const char *artist_read_reg_name(uint64_t addr)
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static const char *lasips2_read_reg_name(uint64_t addr)
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{
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switch (addr & 0xc) {
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case REG_PS2_ID:
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@ -116,7 +116,7 @@ static const char *artist_read_reg_name(uint64_t addr)
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}
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}
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static const char *artist_write_reg_name(uint64_t addr)
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static const char *lasips2_write_reg_name(uint64_t addr)
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{
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switch (addr & 0x0c) {
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case REG_PS2_RESET:
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@ -145,7 +145,7 @@ static void lasips2_reg_write(void *opaque, hwaddr addr, uint64_t val,
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LASIPS2Port *port = opaque;
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trace_lasips2_reg_write(size, port->id, addr,
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artist_write_reg_name(addr), val);
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lasips2_write_reg_name(addr), val);
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switch (addr & 0xc) {
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case REG_PS2_CONTROL:
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@ -239,7 +239,7 @@ static uint64_t lasips2_reg_read(void *opaque, hwaddr addr, unsigned size)
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break;
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}
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trace_lasips2_reg_read(size, port->id, addr,
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artist_read_reg_name(addr), ret);
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lasips2_read_reg_name(addr), ret);
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return ret;
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}
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@ -1875,7 +1875,7 @@ void hmp_rocker_ports(Monitor *mon, const QDict *qdict)
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monitor_printf(mon, " port link duplex neg?\n");
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for (port = list; port; port = port->next) {
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monitor_printf(mon, "%10s %-4s %-3s %2s %-3s\n",
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monitor_printf(mon, "%10s %-4s %-3s %2s %s\n",
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port->value->name,
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port->value->enabled ? port->value->link_up ?
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"up" : "down" : "!ena",
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@ -464,13 +464,13 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags)
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snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op);
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#ifdef TARGET_X86_64
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if (env->hflags & HF_CS64_MASK) {
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qemu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%-8s\n",
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qemu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%s\n",
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env->cc_src, env->cc_dst,
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cc_op_name);
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} else
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#endif
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{
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qemu_fprintf(f, "CCS=%08x CCD=%08x CCO=%-8s\n",
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qemu_fprintf(f, "CCS=%08x CCD=%08x CCO=%s\n",
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(uint32_t)env->cc_src, (uint32_t)env->cc_dst,
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cc_op_name);
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}
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@ -4878,7 +4878,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data)
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desc = g_strdup_printf("%s", model_id);
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}
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qemu_printf("x86 %-20s %-58s\n", name, desc);
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qemu_printf("x86 %-20s %s\n", name, desc);
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}
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/* list available CPU models and flags */
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@ -8734,7 +8734,7 @@ void ppc_cpu_list(void)
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#ifdef CONFIG_KVM
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qemu_printf("\n");
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qemu_printf("PowerPC %-16s\n", "host");
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qemu_printf("PowerPC %s\n", "host");
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#endif
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}
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@ -398,14 +398,14 @@ void s390_cpu_list(void)
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for (feat = 0; feat < S390_FEAT_MAX; feat++) {
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const S390FeatDef *def = s390_feat_def(feat);
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qemu_printf("%-20s %-50s\n", def->name, def->desc);
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qemu_printf("%-20s %s\n", def->name, def->desc);
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}
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qemu_printf("\nRecognized feature groups:\n");
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for (group = 0; group < S390_FEAT_GROUP_MAX; group++) {
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const S390FeatGroupDef *def = s390_feat_group_def(group);
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qemu_printf("%-20s %-50s\n", def->name, def->desc);
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qemu_printf("%-20s %s\n", def->name, def->desc);
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}
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}
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@ -1098,7 +1098,7 @@ static void dump_tlb(CPUXtensaState *env, bool dtlb)
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qemu_printf("\tVaddr Paddr ASID Attr RWX Cache\n"
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"\t---------- ---------- ---- ---- --- -------\n");
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}
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qemu_printf("\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %-7s\n",
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qemu_printf("\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %s\n",
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entry->vaddr,
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entry->paddr,
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entry->asid,
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