Fix debug print warning
Steps: 1.enable qemu debug print, using simply scprit as below: grep "//#define DEBUG" * -rl | xargs sed -i "s/\/\/#define DEBUG/#define DEBUG/g" 2. make -j 3. get some warning: hw/i2c/pm_smbus.c: In function 'smb_ioport_writeb': hw/i2c/pm_smbus.c:142: warning: format '%04x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/i2c/pm_smbus.c:142: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/i2c/pm_smbus.c: In function 'smb_ioport_readb': hw/i2c/pm_smbus.c:209: warning: format '%04x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/intc/i8259.c: In function 'pic_ioport_read': hw/intc/i8259.c:373: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/input/pckbd.c: In function 'kbd_write_command': hw/input/pckbd.c:232: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' hw/input/pckbd.c: In function 'kbd_write_data': hw/input/pckbd.c:333: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' hw/isa/apm.c: In function 'apm_ioport_writeb': hw/isa/apm.c:44: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/isa/apm.c:44: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/isa/apm.c: In function 'apm_ioport_readb': hw/isa/apm.c:67: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'hwaddr' hw/timer/mc146818rtc.c: In function 'cmos_ioport_write': hw/timer/mc146818rtc.c:394: warning: format '%02x' expects type 'unsigned int', but argument 3 has type 'uint64_t' hw/i386/pc.c: In function 'port92_write': hw/i386/pc.c:479: warning: format '%02x' expects type 'unsigned int', but argument 2 has type 'uint64_t' Fix them. Cc: qemu-trivial@nongnu.org Signed-off-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -139,7 +139,8 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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{
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{
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PMSMBus *s = opaque;
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PMSMBus *s = opaque;
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SMBUS_DPRINTF("SMB writeb port=0x%04x val=0x%02x\n", addr, val);
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SMBUS_DPRINTF("SMB writeb port=0x%04" HWADDR_PRIx
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" val=0x%02" PRIx64 "\n", addr, val);
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switch(addr) {
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switch(addr) {
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case SMBHSTSTS:
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case SMBHSTSTS:
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s->smb_stat = (~(val & 0xff)) & s->smb_stat;
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s->smb_stat = (~(val & 0xff)) & s->smb_stat;
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@ -206,7 +207,7 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
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val = 0;
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val = 0;
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break;
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break;
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}
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}
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SMBUS_DPRINTF("SMB readb port=0x%04x val=0x%02x\n", addr, val);
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SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n", addr, val);
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return val;
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return val;
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}
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}
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@ -481,7 +481,7 @@ static void port92_write(void *opaque, hwaddr addr, uint64_t val,
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Port92State *s = opaque;
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Port92State *s = opaque;
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int oldval = s->outport;
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int oldval = s->outport;
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DPRINTF("port92: write 0x%02x\n", val);
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DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
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s->outport = val;
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s->outport = val;
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qemu_set_irq(*s->a20_out, (val >> 1) & 1);
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qemu_set_irq(*s->a20_out, (val >> 1) & 1);
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if ((val & 1) && !(oldval & 1)) {
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if ((val & 1) && !(oldval & 1)) {
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@ -229,7 +229,7 @@ static void kbd_write_command(void *opaque, hwaddr addr,
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{
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{
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KBDState *s = opaque;
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KBDState *s = opaque;
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DPRINTF("kbd: write cmd=0x%02x\n", val);
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DPRINTF("kbd: write cmd=0x%02" PRIx64 "\n", val);
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/* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
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/* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
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* low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
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* low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
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@ -330,7 +330,7 @@ static void kbd_write_data(void *opaque, hwaddr addr,
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{
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{
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KBDState *s = opaque;
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KBDState *s = opaque;
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DPRINTF("kbd: write data=0x%02x\n", val);
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DPRINTF("kbd: write data=0x%02" PRIx64 "\n", val);
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switch(s->write_cmd) {
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switch(s->write_cmd) {
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case 0:
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case 0:
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@ -370,7 +370,7 @@ static uint64_t pic_ioport_read(void *opaque, hwaddr addr,
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ret = s->imr;
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ret = s->imr;
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}
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}
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}
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}
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DPRINTF("read: addr=0x%02x val=0x%02x\n", addr, ret);
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DPRINTF("read: addr=0x%02" HWADDR_PRIx " val=0x%02x\n", addr, ret);
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return ret;
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return ret;
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}
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}
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@ -41,7 +41,8 @@ static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
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{
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{
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APMState *apm = opaque;
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APMState *apm = opaque;
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addr &= 1;
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addr &= 1;
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APM_DPRINTF("apm_ioport_writeb addr=0x%x val=0x%02x\n", addr, val);
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APM_DPRINTF("apm_ioport_writeb addr=0x%" HWADDR_PRIx
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" val=0x%02" PRIx64 "\n", addr, val);
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if (addr == 0) {
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if (addr == 0) {
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apm->apmc = val;
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apm->apmc = val;
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@ -64,7 +65,7 @@ static uint64_t apm_ioport_readb(void *opaque, hwaddr addr, unsigned size)
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} else {
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} else {
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val = apm->apms;
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val = apm->apms;
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}
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}
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APM_DPRINTF("apm_ioport_readb addr=0x%x val=0x%02x\n", addr, val);
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APM_DPRINTF("apm_ioport_readb addr=0x%" HWADDR_PRIx " val=0x%02x\n", addr, val);
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return val;
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return val;
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}
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}
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@ -391,7 +391,7 @@ static void cmos_ioport_write(void *opaque, hwaddr addr,
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if ((addr & 1) == 0) {
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if ((addr & 1) == 0) {
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s->cmos_index = data & 0x7f;
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s->cmos_index = data & 0x7f;
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} else {
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} else {
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CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02x\n",
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CMOS_DPRINTF("cmos: write index=0x%02x val=0x%02" PRIx64 "\n",
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s->cmos_index, data);
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s->cmos_index, data);
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switch(s->cmos_index) {
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switch(s->cmos_index) {
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case RTC_SECONDS_ALARM:
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case RTC_SECONDS_ALARM:
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