hw/intc/loongarch_ipi: Add loongarch IPI support
Loongarch IPI is added here, it inherits from class TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can be used when ipi is emulated in userspace with KVM mode. Signed-off-by: Bibo Mao <maobibo@loongson.cn> [PMD: Rebased and simplified] Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Tested-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20240805180622.21001-13-philmd@linaro.org>
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@ -94,6 +94,10 @@ config LOONGSON_IPI
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bool
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select LOONGSON_IPI_COMMON
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config LOONGARCH_IPI
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bool
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select LOONGSON_IPI_COMMON
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config LOONGARCH_PCH_PIC
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bool
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select UNIMP
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68
hw/intc/loongarch_ipi.c
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68
hw/intc/loongarch_ipi.c
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@ -0,0 +1,68 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* LoongArch IPI interrupt support
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*
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* Copyright (C) 2024 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "hw/boards.h"
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#include "hw/intc/loongarch_ipi.h"
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#include "target/loongarch/cpu.h"
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static AddressSpace *get_iocsr_as(CPUState *cpu)
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{
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return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
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}
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static int archid_cmp(const void *a, const void *b)
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{
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CPUArchId *archid_a = (CPUArchId *)a;
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CPUArchId *archid_b = (CPUArchId *)b;
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return archid_a->arch_id - archid_b->arch_id;
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}
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static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id)
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{
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CPUArchId apic_id, *found_cpu;
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apic_id.arch_id = id;
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found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus,
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ms->possible_cpus->len,
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sizeof(*ms->possible_cpus->cpus),
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archid_cmp);
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return found_cpu;
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}
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static CPUState *loongarch_cpu_by_arch_id(int64_t arch_id)
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{
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MachineState *machine = MACHINE(qdev_get_machine());
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CPUArchId *archid;
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archid = find_cpu_by_archid(machine, arch_id);
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if (archid) {
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return CPU(archid->cpu);
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}
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return NULL;
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}
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static void loongarch_ipi_class_init(ObjectClass *klass, void *data)
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{
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LoongsonIPICommonClass *licc = LOONGSON_IPI_COMMON_CLASS(klass);
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licc->get_iocsr_as = get_iocsr_as;
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licc->cpu_by_arch_id = loongarch_cpu_by_arch_id;
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}
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static const TypeInfo loongarch_ipi_types[] = {
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{
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.name = TYPE_LOONGARCH_IPI,
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.parent = TYPE_LOONGSON_IPI_COMMON,
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.class_init = loongarch_ipi_class_init,
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}
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};
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DEFINE_TYPES(loongarch_ipi_types)
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@ -71,6 +71,7 @@ specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_XIVE'],
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specific_ss.add(when: 'CONFIG_M68K_IRQC', if_true: files('m68k_irqc.c'))
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specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
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specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
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specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
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specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
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specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
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specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
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25
include/hw/intc/loongarch_ipi.h
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25
include/hw/intc/loongarch_ipi.h
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@ -0,0 +1,25 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* LoongArch IPI interrupt header files
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*
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* Copyright (C) 2024 Loongson Technology Corporation Limited
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*/
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#ifndef HW_LOONGARCH_IPI_H
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#define HW_LOONGARCH_IPI_H
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#include "qom/object.h"
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#include "hw/intc/loongson_ipi_common.h"
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#define TYPE_LOONGARCH_IPI "loongarch_ipi"
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OBJECT_DECLARE_TYPE(LoongarchIPIState, LoongarchIPIClass, LOONGARCH_IPI)
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struct LoongarchIPIState {
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LoongsonIPICommonState parent_obj;
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};
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struct LoongarchIPIClass {
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LoongsonIPICommonClass parent_class;
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};
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#endif
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