softmmu: Expand comments describing max_bounce_buffer_size

Clarify how the parameter gets configured and how it is used when
servicing DMA mapping requests targeting indirect memory regions.

Signed-off-by: Mattias Nissler <mnissler@rivosinc.com>
Message-Id: <20240910213512.843130-1-mnissler@rivosinc.com>
Acked-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Mattias Nissler 2024-09-10 14:35:12 -07:00 committed by Michael S. Tsirkin
parent 92ec780519
commit c3ec57e495
2 changed files with 13 additions and 2 deletions

View File

@ -1104,7 +1104,14 @@ struct AddressSpace {
QTAILQ_HEAD(, MemoryListener) listeners;
QTAILQ_ENTRY(AddressSpace) address_spaces_link;
/* Maximum DMA bounce buffer size used for indirect memory map requests */
/*
* Maximum DMA bounce buffer size used for indirect memory map requests.
* This limits the total size of bounce buffer allocations made for
* DMA requests to indirect memory regions within this AddressSpace. DMA
* requests that exceed the limit (e.g. due to overly large requested size
* or concurrent DMA requests having claimed too much buffer space) will be
* rejected and left to the caller to handle.
*/
size_t max_bounce_buffer_size;
/* Total size of bounce buffers currently allocated, atomically accessed */
size_t bounce_buffer_size;

View File

@ -168,7 +168,11 @@ struct PCIDevice {
char *failover_pair_id;
uint32_t acpi_index;
/* Maximum DMA bounce buffer size used for indirect memory map requests */
/*
* Indirect DMA region bounce buffer size as configured for the device. This
* is a configuration parameter that is reflected into bus_master_as when
* realizing the device.
*/
uint32_t max_bounce_buffer_size;
};