hw/cxl/cxl_device.h: correct typos
Correct typos automatically found with the `typos` tool <https://crates.io/crates/typos> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -268,7 +268,7 @@ void cxl_event_set_status(CXLDeviceState *cxl_dstate, CXLEventLogType log_type,
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/*
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* Helper macro to initialize capability headers for CXL devices.
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*
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* In CXL r3.1 Section 8.2.8.2: CXL Device Capablity Header Register, this is
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* In CXL r3.1 Section 8.2.8.2: CXL Device Capability Header Register, this is
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* listed as a 128b register, but in CXL r3.1 Section 8.2.8: CXL Device Register
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* Interface, it says:
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* > No registers defined in Section 8.2.8 are larger than 64-bits wide so that
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@ -276,7 +276,7 @@ void cxl_event_set_status(CXLDeviceState *cxl_dstate, CXLEventLogType log_type,
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* > followed, the behavior is undefined.
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*
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* > To illustrate how the fields fit together, the layouts ... are shown as
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* > wider than a 64 bit register. Implemenations are expected to use any size
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* > wider than a 64 bit register. Implementations are expected to use any size
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* > accesses for this information up to 64 bits without lost of functionality
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*
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* Here we've chosen to make it 4 dwords.
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