disas/microblaze: Re-indent print_insn_microblaze
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20240412073346.458116-16-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
58e5632c70
commit
c3c6fed646
@ -787,134 +787,153 @@ static void print_immval_addr(struct disassemble_info *info, bool immfound,
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}
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int
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print_insn_microblaze (bfd_vma memaddr, struct disassemble_info * info)
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print_insn_microblaze(bfd_vma memaddr, struct disassemble_info *info)
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{
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fprintf_function fprintf_func = info->fprintf_func;
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void * stream = info->stream;
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unsigned long inst, prev_inst;
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const struct op_code_struct *op, *pop;
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int immval = 0;
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bfd_boolean immfound = FALSE;
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static bfd_vma prev_insn_addr = -1; /*init the prev insn addr */
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static int prev_insn_vma = -1; /*init the prev insn vma */
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int curr_insn_vma = info->buffer_vma;
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fprintf_function fprintf_func = info->fprintf_func;
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void *stream = info->stream;
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unsigned long inst, prev_inst;
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const struct op_code_struct *op, *pop;
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int immval = 0;
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bool immfound = false;
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static bfd_vma prev_insn_addr = -1; /*init the prev insn addr */
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static int prev_insn_vma = -1; /*init the prev insn vma */
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int curr_insn_vma = info->buffer_vma;
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info->bytes_per_chunk = 4;
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info->bytes_per_chunk = 4;
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inst = read_insn_microblaze (memaddr, info, &op);
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if (inst == 0) {
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return -1;
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}
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inst = read_insn_microblaze (memaddr, info, &op);
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if (inst == 0) {
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return -1;
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}
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if (prev_insn_vma == curr_insn_vma) {
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if (memaddr-(info->bytes_per_chunk) == prev_insn_addr) {
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prev_inst = read_insn_microblaze (prev_insn_addr, info, &pop);
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if (prev_inst == 0)
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return -1;
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if (pop->instr == imm) {
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immval = (get_int_field_imm(prev_inst) << 16) & 0xffff0000;
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immfound = TRUE;
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if (prev_insn_vma == curr_insn_vma) {
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if (memaddr - info->bytes_per_chunk == prev_insn_addr) {
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prev_inst = read_insn_microblaze (prev_insn_addr, info, &pop);
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if (prev_inst == 0)
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return -1;
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if (pop->instr == imm) {
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immval = (get_int_field_imm(prev_inst) << 16) & 0xffff0000;
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immfound = TRUE;
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}
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else {
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immval = 0;
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immfound = FALSE;
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}
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}
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}
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else {
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immval = 0;
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immfound = FALSE;
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}
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}
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}
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/* make curr insn as prev insn */
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prev_insn_addr = memaddr;
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prev_insn_vma = curr_insn_vma;
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/* make curr insn as prev insn */
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prev_insn_addr = memaddr;
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prev_insn_vma = curr_insn_vma;
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if (op->name == 0) {
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fprintf_func (stream, ".short 0x%04lx", inst);
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}
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else
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{
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fprintf_func (stream, "%s", op->name);
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if (op->name == 0) {
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fprintf_func (stream, ".short 0x%04lx", inst);
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return 4;
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}
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fprintf_func (stream, "%s", op->name);
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switch (op->inst_type)
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{
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case INST_TYPE_RD_R1_R2:
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fprintf_func(stream, "\t%s, %s, %s", get_field_rd(inst), get_field_r1(inst), get_field_r2(inst));
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break;
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case INST_TYPE_RD_R1_IMM:
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fprintf_func(stream, "\t%s, %s, %s", get_field_rd(inst), get_field_r1(inst), get_field_imm(inst));
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if (get_int_field_r1(inst) == 0) {
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print_immval_addr(info, immfound, immval, inst, 0);
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}
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break;
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case INST_TYPE_RD_R1_IMM5:
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fprintf_func(stream, "\t%s, %s, %s", get_field_rd(inst), get_field_r1(inst), get_field_imm5(inst));
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break;
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case INST_TYPE_RD_RFSL:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_rfsl(inst));
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break;
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case INST_TYPE_R1_RFSL:
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fprintf_func(stream, "\t%s, %s", get_field_r1(inst), get_field_rfsl(inst));
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break;
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case INST_TYPE_RD_SPECIAL:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_special(inst, op));
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break;
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case INST_TYPE_SPECIAL_R1:
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fprintf_func(stream, "\t%s, %s", get_field_special(inst, op), get_field_r1(inst));
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break;
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case INST_TYPE_RD_R1:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_r1(inst));
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break;
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case INST_TYPE_R1_R2:
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fprintf_func(stream, "\t%s, %s", get_field_r1(inst), get_field_r2(inst));
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break;
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case INST_TYPE_R1_IMM:
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fprintf_func(stream, "\t%s, %s", get_field_r1(inst), get_field_imm(inst));
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/* The non-pc relative instructions are returns, which shouldn't
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have a label printed */
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if (op->inst_offset_type == INST_PC_OFFSET) {
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print_immval_addr(info, immfound, immval, inst, memaddr);
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}
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break;
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case INST_TYPE_RD_IMM:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_imm(inst));
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print_immval_addr(info, immfound, immval, inst,
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op->inst_offset_type == INST_PC_OFFSET
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? memaddr : 0);
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break;
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case INST_TYPE_IMM:
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fprintf_func(stream, "\t%s", get_field_imm(inst));
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if (op->instr != imm) {
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print_immval_addr(info, immfound, immval, inst,
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op->inst_offset_type == INST_PC_OFFSET
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? memaddr : 0);
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}
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break;
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case INST_TYPE_RD_R2:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_r2(inst));
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break;
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case INST_TYPE_R2:
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fprintf_func(stream, "\t%s", get_field_r2(inst));
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break;
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case INST_TYPE_R1:
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fprintf_func(stream, "\t%s", get_field_r1(inst));
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break;
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case INST_TYPE_RD_R1_SPECIAL:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_r2(inst));
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break;
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case INST_TYPE_RD_IMM15:
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fprintf_func(stream, "\t%s, %s", get_field_rd(inst), get_field_imm15(inst));
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break;
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/* For tuqula instruction */
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case INST_TYPE_RD:
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fprintf_func(stream, "\t%s", get_field_rd(inst));
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break;
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case INST_TYPE_RFSL:
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fprintf_func(stream, "\t%s", get_field_rfsl(inst));
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break;
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default:
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/* if the disassembler lags the instruction set */
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fprintf_func (stream, "\tundecoded operands, inst is 0x%04lx", inst);
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break;
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}
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switch (op->inst_type) {
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case INST_TYPE_RD_R1_R2:
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fprintf_func(stream, "\t%s, %s, %s",
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get_field_rd(inst), get_field_r1(inst),
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get_field_r2(inst));
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break;
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case INST_TYPE_RD_R1_IMM:
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fprintf_func(stream, "\t%s, %s, %s",
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get_field_rd(inst), get_field_r1(inst),
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get_field_imm(inst));
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if (get_int_field_r1(inst) == 0) {
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print_immval_addr(info, immfound, immval, inst, 0);
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}
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break;
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case INST_TYPE_RD_R1_IMM5:
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fprintf_func(stream, "\t%s, %s, %s",
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get_field_rd(inst), get_field_r1(inst),
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get_field_imm5(inst));
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break;
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case INST_TYPE_RD_RFSL:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_rfsl(inst));
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break;
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case INST_TYPE_R1_RFSL:
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fprintf_func(stream, "\t%s, %s",
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get_field_r1(inst), get_field_rfsl(inst));
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break;
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case INST_TYPE_RD_SPECIAL:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_special(inst, op));
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break;
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case INST_TYPE_SPECIAL_R1:
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fprintf_func(stream, "\t%s, %s",
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get_field_special(inst, op), get_field_r1(inst));
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break;
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case INST_TYPE_RD_R1:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_r1(inst));
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break;
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case INST_TYPE_R1_R2:
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fprintf_func(stream, "\t%s, %s",
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get_field_r1(inst), get_field_r2(inst));
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break;
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case INST_TYPE_R1_IMM:
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fprintf_func(stream, "\t%s, %s",
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get_field_r1(inst), get_field_imm(inst));
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/*
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* The non-pc relative instructions are returns,
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* which shouldn't have a label printed.
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*/
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if (op->inst_offset_type == INST_PC_OFFSET) {
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print_immval_addr(info, immfound, immval, inst, memaddr);
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}
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break;
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case INST_TYPE_RD_IMM:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_imm(inst));
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print_immval_addr(info, immfound, immval, inst,
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op->inst_offset_type == INST_PC_OFFSET
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? memaddr : 0);
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break;
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case INST_TYPE_IMM:
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fprintf_func(stream, "\t%s", get_field_imm(inst));
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if (op->instr != imm) {
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print_immval_addr(info, immfound, immval, inst,
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op->inst_offset_type == INST_PC_OFFSET
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? memaddr : 0);
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}
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break;
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case INST_TYPE_RD_R2:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_r2(inst));
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break;
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case INST_TYPE_R2:
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fprintf_func(stream, "\t%s",
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get_field_r2(inst));
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break;
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case INST_TYPE_R1:
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fprintf_func(stream, "\t%s",
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get_field_r1(inst));
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break;
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case INST_TYPE_RD_R1_SPECIAL:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_r2(inst));
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break;
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case INST_TYPE_RD_IMM15:
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fprintf_func(stream, "\t%s, %s",
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get_field_rd(inst), get_field_imm15(inst));
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break;
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/* For tuqula instruction */
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case INST_TYPE_RD:
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fprintf_func(stream, "\t%s",
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get_field_rd(inst));
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break;
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case INST_TYPE_RFSL:
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fprintf_func(stream, "\t%s",
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get_field_rfsl(inst));
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break;
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default:
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/* if the disassembler lags the instruction set */
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fprintf_func(stream, "\tundecoded operands, inst is 0x%04lx", inst);
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break;
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}
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/* Say how many bytes we consumed? */
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return 4;
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return 4;
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}
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