target/microblaze: Add gdbstub xml
Mirroring the upstream gdb xml files, the two stack boundary registers are separated out. Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -3,3 +3,4 @@ TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL=syscall.tbl
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TARGET_SYSTBL=syscall.tbl
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TARGET_BIG_ENDIAN=y
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TARGET_BIG_ENDIAN=y
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TARGET_HAS_BFLT=y
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TARGET_HAS_BFLT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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@ -2,3 +2,4 @@ TARGET_ARCH=microblaze
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TARGET_BIG_ENDIAN=y
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TARGET_BIG_ENDIAN=y
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TARGET_SUPPORTS_MTTCG=y
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TARGET_SUPPORTS_MTTCG=y
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TARGET_NEED_FDT=y
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TARGET_NEED_FDT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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@ -2,3 +2,4 @@ TARGET_ARCH=microblaze
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TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL_ABI=common
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TARGET_SYSTBL=syscall.tbl
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TARGET_SYSTBL=syscall.tbl
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TARGET_HAS_BFLT=y
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TARGET_HAS_BFLT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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@ -1,3 +1,4 @@
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TARGET_ARCH=microblaze
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TARGET_ARCH=microblaze
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TARGET_SUPPORTS_MTTCG=y
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TARGET_SUPPORTS_MTTCG=y
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TARGET_NEED_FDT=y
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TARGET_NEED_FDT=y
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TARGET_XML_FILES=gdb-xml/microblaze-core.xml gdb-xml/microblaze-stack-protect.xml
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67
gdb-xml/microblaze-core.xml
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67
gdb-xml/microblaze-core.xml
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@ -0,0 +1,67 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.microblaze.core">
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<reg name="r0" bitsize="32" regnum="0"/>
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<reg name="r1" bitsize="32" type="data_ptr"/>
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<reg name="r2" bitsize="32"/>
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<reg name="r3" bitsize="32"/>
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<reg name="r4" bitsize="32"/>
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<reg name="r5" bitsize="32"/>
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<reg name="r6" bitsize="32"/>
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<reg name="r7" bitsize="32"/>
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<reg name="r8" bitsize="32"/>
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<reg name="r9" bitsize="32"/>
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<reg name="r10" bitsize="32"/>
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<reg name="r11" bitsize="32"/>
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<reg name="r12" bitsize="32"/>
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<reg name="r13" bitsize="32"/>
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<reg name="r14" bitsize="32"/>
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<reg name="r15" bitsize="32"/>
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<reg name="r16" bitsize="32"/>
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<reg name="r17" bitsize="32"/>
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<reg name="r18" bitsize="32"/>
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<reg name="r19" bitsize="32"/>
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<reg name="r20" bitsize="32"/>
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<reg name="r21" bitsize="32"/>
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<reg name="r22" bitsize="32"/>
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<reg name="r23" bitsize="32"/>
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<reg name="r24" bitsize="32"/>
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<reg name="r25" bitsize="32"/>
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<reg name="r26" bitsize="32"/>
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<reg name="r27" bitsize="32"/>
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<reg name="r28" bitsize="32"/>
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<reg name="r29" bitsize="32"/>
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<reg name="r30" bitsize="32"/>
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<reg name="r31" bitsize="32"/>
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<reg name="rpc" bitsize="32" type="code_ptr"/>
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<reg name="rmsr" bitsize="32"/>
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<reg name="rear" bitsize="32"/>
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<reg name="resr" bitsize="32"/>
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<reg name="rfsr" bitsize="32"/>
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<reg name="rbtr" bitsize="32"/>
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<reg name="rpvr0" bitsize="32"/>
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<reg name="rpvr1" bitsize="32"/>
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<reg name="rpvr2" bitsize="32"/>
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<reg name="rpvr3" bitsize="32"/>
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<reg name="rpvr4" bitsize="32"/>
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<reg name="rpvr5" bitsize="32"/>
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<reg name="rpvr6" bitsize="32"/>
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<reg name="rpvr7" bitsize="32"/>
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<reg name="rpvr8" bitsize="32"/>
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<reg name="rpvr9" bitsize="32"/>
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<reg name="rpvr10" bitsize="32"/>
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<reg name="rpvr11" bitsize="32"/>
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<reg name="redr" bitsize="32"/>
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<reg name="rpid" bitsize="32"/>
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<reg name="rzpr" bitsize="32"/>
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<reg name="rtlbx" bitsize="32"/>
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<reg name="rtlbsx" bitsize="32"/>
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<reg name="rtlblo" bitsize="32"/>
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<reg name="rtlbhi" bitsize="32"/>
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</feature>
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12
gdb-xml/microblaze-stack-protect.xml
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12
gdb-xml/microblaze-stack-protect.xml
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@ -0,0 +1,12 @@
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<?xml version="1.0"?>
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<!-- Copyright (C) 2008 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.microblaze.stack-protect">
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<reg name="rslr" bitsize="32"/>
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<reg name="rshr" bitsize="32"/>
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</feature>
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@ -28,6 +28,7 @@
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties.h"
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#include "exec/exec-all.h"
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#include "exec/exec-all.h"
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#include "exec/gdbstub.h"
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#include "fpu/softfloat-helpers.h"
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#include "fpu/softfloat-helpers.h"
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static const struct {
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static const struct {
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@ -294,6 +295,9 @@ static void mb_cpu_initfn(Object *obj)
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CPUMBState *env = &cpu->env;
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CPUMBState *env = &cpu->env;
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cpu_set_cpustate_pointers(cpu);
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cpu_set_cpustate_pointers(cpu);
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gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect,
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mb_cpu_gdb_write_stack_protect, 2,
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"microblaze-stack-protect.xml", 0);
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set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
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set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
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@ -422,7 +426,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
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cc->sysemu_ops = &mb_sysemu_ops;
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cc->sysemu_ops = &mb_sysemu_ops;
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#endif
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#endif
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device_class_set_props(dc, mb_properties);
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device_class_set_props(dc, mb_properties);
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cc->gdb_num_core_regs = 32 + 27;
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cc->gdb_num_core_regs = 32 + 25;
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cc->gdb_core_xml_file = "microblaze-core.xml";
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cc->disas_set_info = mb_disas_set_info;
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cc->disas_set_info = mb_disas_set_info;
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cc->tcg_ops = &mb_tcg_ops;
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cc->tcg_ops = &mb_tcg_ops;
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@ -367,6 +367,8 @@ hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
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MemTxAttrs *attrs);
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MemTxAttrs *attrs);
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int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
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int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
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int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
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int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg);
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int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg);
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static inline uint32_t mb_cpu_read_msr(const CPUMBState *env)
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static inline uint32_t mb_cpu_read_msr(const CPUMBState *env)
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{
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{
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@ -39,8 +39,11 @@ enum {
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GDB_PVR0 = 32 + 6,
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GDB_PVR0 = 32 + 6,
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GDB_PVR11 = 32 + 17,
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GDB_PVR11 = 32 + 17,
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GDB_EDR = 32 + 18,
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GDB_EDR = 32 + 18,
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GDB_SLR = 32 + 25,
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};
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GDB_SHR = 32 + 26,
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enum {
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GDB_SP_SHL,
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GDB_SP_SHR,
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};
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};
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int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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@ -83,12 +86,6 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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case GDB_EDR:
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case GDB_EDR:
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val = env->edr;
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val = env->edr;
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break;
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break;
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case GDB_SLR:
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val = env->slr;
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break;
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case GDB_SHR:
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val = env->shr;
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break;
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default:
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default:
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/* Other SRegs aren't modeled, so report a value of 0 */
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/* Other SRegs aren't modeled, so report a value of 0 */
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val = 0;
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val = 0;
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@ -97,6 +94,23 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
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return gdb_get_reg32(mem_buf, val);
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return gdb_get_reg32(mem_buf, val);
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}
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}
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int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n)
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{
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uint32_t val;
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switch (n) {
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case GDB_SP_SHL:
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val = env->slr;
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break;
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case GDB_SP_SHR:
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val = env->shr;
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break;
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default:
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return 0;
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}
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return gdb_get_reg32(mem_buf, val);
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}
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int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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{
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{
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MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
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MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
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@ -135,12 +149,21 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
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case GDB_EDR:
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case GDB_EDR:
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env->edr = tmp;
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env->edr = tmp;
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break;
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break;
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case GDB_SLR:
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}
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env->slr = tmp;
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return 4;
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break;
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}
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case GDB_SHR:
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env->shr = tmp;
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int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n)
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break;
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{
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switch (n) {
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case GDB_SP_SHL:
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env->slr = ldl_p(mem_buf);
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break;
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case GDB_SP_SHR:
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env->shr = ldl_p(mem_buf);
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break;
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default:
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return 0;
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}
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}
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return 4;
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return 4;
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}
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}
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