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target/mips: Remove CPUMIPSState::saarp field

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This field is never set, so remove the unreachable code.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-5-philmd@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2024-02-09 08:57:50 +01:00
parent b267e78908
commit c2bb8e1bcc
2 changed files with 0 additions and 7 deletions
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6
hw/misc/mips_itu.c
View File

@ -516,7 +516,6 @@ static void mips_itu_init(Object *obj)
static void mips_itu_realize(DeviceState *dev, Error **errp) static void mips_itu_realize(DeviceState *dev, Error **errp)
{ {
MIPSITUState *s = MIPS_ITU(dev); MIPSITUState *s = MIPS_ITU(dev);
CPUMIPSState *env;
if (s->num_fifo > ITC_FIFO_NUM_MAX) { if (s->num_fifo > ITC_FIFO_NUM_MAX) {
error_setg(errp, "Exceed maximum number of FIFO cells: %d", error_setg(errp, "Exceed maximum number of FIFO cells: %d",
@ -533,11 +532,6 @@ static void mips_itu_realize(DeviceState *dev, Error **errp)
return; return;
} }
env = &MIPS_CPU(s->cpu0)->env;
if (env->saarp) {
s->saar = env->CP0_SAAR;
}
s->cell = g_new(ITCStorageCell, get_num_cells(s)); s->cell = g_new(ITCStorageCell, get_num_cells(s));
} }

1
target/mips/cpu.h
View File

@ -1174,7 +1174,6 @@ typedef struct CPUArchState {
uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */ uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */ uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */
uint64_t insn_flags; /* Supported instruction set */ uint64_t insn_flags; /* Supported instruction set */
int saarp;
/* Fields up to this point are cleared by a CPU reset */ /* Fields up to this point are cleared by a CPU reset */
struct {} end_reset_fields; struct {} end_reset_fields;