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heathrow: change heathrow_pic_init() to return the heathrow device

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This enables the device to be made available during the setup of the Old World
machine. In order to pass back the previous set of IRQs we temporarily introduce
a new pic_irqs parameter until it can be removed.

An additional benefit of this change is that it is also possible to remove the
pic_mem pointer used for macio by accessing the memory region via sysbus.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Mark Cave-Ayland 2018-02-28 20:32:36 +00:00 committed by David Gibson
parent ec7c2709d7
commit c29646009a
3 changed files with 13 additions and 10 deletions
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10
hw/intc/heathrow_pic.c
View File

@ -170,13 +170,15 @@ static void heathrow_reset(DeviceState *d)
static void heathrow_init(Object *obj)
{
HeathrowState *s = HEATHROW(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
memory_region_init_io(&s->mem, OBJECT(s), &heathrow_ops, s,
"heathrow-pic", 0x1000);
sysbus_init_mmio(sbd, &s->mem);
}
qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
int nb_cpus, qemu_irq **irqs)
DeviceState *heathrow_pic_init(int nb_cpus, qemu_irq **irqs,
qemu_irq **pic_irqs)
{
DeviceState *d;
HeathrowState *s;
@ -188,9 +190,9 @@ qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
/* only 1 CPU */
s->irqs = irqs[0];
*pmem = &s->mem;
*pic_irqs = qemu_allocate_irqs(heathrow_set_irq, s, HEATHROW_NUM_IRQS);
return qemu_allocate_irqs(heathrow_set_irq, s, HEATHROW_NUM_IRQS);
return d;
}
static void heathrow_class_init(ObjectClass *oc, void *data)

4
hw/ppc/mac.h
View File

@ -79,8 +79,8 @@ void macio_init(PCIDevice *dev,
MemoryRegion *pic_mem);
/* Heathrow PIC */
qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
int nb_cpus, qemu_irq **irqs);
DeviceState *heathrow_pic_init(int nb_cpus, qemu_irq **irqs,
qemu_irq **pic_irqs);
/* Grackle PCI */
#define TYPE_GRACKLE_PCI_HOST_BRIDGE "grackle-pcihost"

9
hw/ppc/mac_oldworld.c
View File

@ -94,11 +94,11 @@ static void ppc_heathrow_init(MachineState *machine)
PCIBus *pci_bus;
PCIDevice *macio;
MACIOIDEState *macio_ide;
DeviceState *dev;
DeviceState *dev, *pic_dev;
SysBusDevice *sbd;
BusState *adb_bus;
int bios_size, ndrv_size;
uint8_t *ndrv_file;
MemoryRegion *pic_mem;
uint16_t ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
@ -257,7 +257,7 @@ static void ppc_heathrow_init(MachineState *machine)
error_report("Only 6xx bus is supported on heathrow machine");
exit(1);
}
pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
pic_dev = heathrow_pic_init(1, heathrow_irqs, &pic);
pci_bus = pci_grackle_init(0xfec00000, pic,
get_system_memory(),
get_system_io());
@ -280,7 +280,8 @@ static void ppc_heathrow_init(MachineState *machine)
qdev_connect_gpio_out(dev, 5, pic[0x0E]); /* IDE-1 */
qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE-1 DMA */
qdev_prop_set_uint64(dev, "frequency", tbfreq);
macio_init(macio, pic_mem);
sbd = SYS_BUS_DEVICE(pic_dev);
macio_init(macio, sysbus_mmio_get_region(sbd, 0));
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[0]"));