Generated code size reduction with linux-user for hppa
Would you please consider pulling this trivial fix, which reduces the generated code on x86 by ~3% when running linux-user with the hppa target? Thanks, Helge -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZMwriQAKCRD3ErUQojoP X0oxAQC7HlQ4j23o4ylqbXTiZdOeY26TjWTlw38OkuSXcqgCMAD/UmwEDawEGTKv SuRjrASdFzpjvjDss2nreahL9hGvrAI= =eoAk -----END PGP SIGNATURE----- Merge tag 'hppa-linux-user-speedup-pull-request' of https://github.com/hdeller/qemu-hppa into staging Generated code size reduction with linux-user for hppa Would you please consider pulling this trivial fix, which reduces the generated code on x86 by ~3% when running linux-user with the hppa target? Thanks, Helge # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZMwriQAKCRD3ErUQojoP # X0oxAQC7HlQ4j23o4ylqbXTiZdOeY26TjWTlw38OkuSXcqgCMAD/UmwEDawEGTKv # SuRjrASdFzpjvjDss2nreahL9hGvrAI= # =eoAk # -----END PGP SIGNATURE----- # gpg: Signature made Thu 03 Aug 2023 03:34:49 PM PDT # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa-linux-user-speedup-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Move iaoq registers and thus reduce generated code size Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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c26d005e62
@ -168,6 +168,9 @@ typedef struct {
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} hppa_tlb_entry;
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typedef struct CPUArchState {
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target_ureg iaoq_f; /* front */
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target_ureg iaoq_b; /* back, aka next instruction */
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target_ureg gr[32];
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uint64_t fr[32];
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uint64_t sr[8]; /* stored shifted into place for gva */
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@ -186,8 +189,6 @@ typedef struct CPUArchState {
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target_ureg psw_cb; /* in least significant bit of next nibble */
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target_ureg psw_cb_msb; /* boolean */
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target_ureg iaoq_f; /* front */
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target_ureg iaoq_b; /* back, aka next instruction */
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uint64_t iasq_f;
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uint64_t iasq_b;
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