v3: don't call reset functions on cpu initialization
There is absolutely no need to call reset functions when initializing devices. Since we are already registering them, calling qemu_system_reset() should suffice. Actually, it is what happens when we reboot the machine, and using the same process instead of a special case semantics will even allow us to find bugs easier. Furthermore, the fact that we initialize things like the cpu quite early, leads to the need to introduce synchronization stuff like qemu_system_cond. This patch removes it entirely. All we need to do is call qemu_system_reset() only when we're already sure the system is up and running I tested it with qemu (with and without io-thread) and qemu-kvm, and it seems to be doing okay - although qemu-kvm uses a slightly different patch. [ v2: user mode still needs cpu_reset, so put it in ifdef. ] [ v3: leave qemu_system_cond for now. ] Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -981,7 +981,6 @@ int apic_init(CPUState *env)
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s->id = env->cpuid_apic_id;
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s->cpu_env = env;
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apic_reset(s);
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msix_supported = 1;
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/* XXX: mapping more APICs at the same memory location */
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@ -1113,7 +1113,6 @@ static int pci_e1000_init(PCIDevice *pci_dev)
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qemu_format_nic_info_str(d->vc, macaddr);
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vmstate_register(-1, &vmstate_e1000, d);
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e1000_reset(d);
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if (!pci_dev->qdev.hotplugged) {
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static int loaded = 0;
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@ -577,7 +577,6 @@ void hpet_init(qemu_irq *irq) {
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HPETTimer *timer = &s->timer[i];
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timer->qemu_timer = qemu_new_timer(vm_clock, hpet_timer, timer);
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}
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hpet_reset(s);
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vmstate_register(-1, &vmstate_hpet, s);
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qemu_register_reset(hpet_reset, s);
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/* HPET Area */
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@ -513,7 +513,5 @@ PITState *pit_init(int base, qemu_irq irq)
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register_ioport_write(base, 4, 1, pit_ioport_write, pit);
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register_ioport_read(base, 3, 1, pit_ioport_read, pit);
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pit_reset(pit);
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return pit;
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}
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@ -120,7 +120,6 @@ static int pci_piix_ide_initfn(PCIIDEState *d)
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pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
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qemu_register_reset(piix3_reset, d);
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piix3_reset(d);
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pci_register_bar(&d->dev, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map);
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@ -97,7 +97,6 @@ static int piix4_initfn(PCIDevice *d)
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PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION; // header_type = PCI_multifunction, generic
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piix4_dev = d;
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piix4_reset(d);
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qemu_register_reset(piix4_reset, d);
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return 0;
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}
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@ -341,7 +341,6 @@ static int piix3_initfn(PCIDevice *dev)
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pci_conf[PCI_HEADER_TYPE] =
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PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION; // header_type = PCI_multifunction, generic
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piix3_reset(d);
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qemu_register_reset(piix3_reset, d);
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return 0;
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}
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@ -3331,7 +3331,7 @@ static int pci_rtl8139_init(PCIDevice *dev)
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PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map);
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qemu_macaddr_default_if_unset(&s->conf.macaddr);
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rtl8139_reset(&s->dev.qdev);
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s->vc = qemu_new_vlan_client(NET_CLIENT_TYPE_NIC,
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s->conf.vlan, s->conf.peer,
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dev->qdev.info->name, dev->qdev.id,
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@ -725,7 +725,6 @@ static void serial_init_core(SerialState *s)
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s->transmit_timer = qemu_new_timer(vm_clock, (QEMUTimerCB *) serial_xmit, s);
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qemu_register_reset(serial_reset, s);
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serial_reset(s);
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qemu_chr_add_handlers(s->chr, serial_can_receive1, serial_receive1,
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serial_event, s);
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@ -1698,7 +1698,6 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev,
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ohci->async_td = 0;
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qemu_register_reset(ohci_reset, ohci);
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ohci_reset(ohci);
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}
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typedef struct {
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@ -1079,7 +1079,6 @@ static int usb_uhci_common_initfn(UHCIState *s)
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s->num_ports_vmstate = NB_PORTS;
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qemu_register_reset(uhci_reset, s);
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uhci_reset(s);
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/* Use region 4 for consistency with real hardware. BSD guests seem
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to rely on this. */
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1
hw/vga.c
1
hw/vga.c
@ -2241,7 +2241,6 @@ void vga_common_init(VGACommonState *s, int vga_ram_size)
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s->update_retrace_info = vga_precise_update_retrace_info;
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break;
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}
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vga_reset(s);
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}
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/* used by both ISA and PCI */
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@ -1885,7 +1885,9 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
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return NULL;
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}
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mce_init(env);
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#ifdef CONFIG_USER_ONLY
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cpu_reset(env);
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#endif
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qemu_init_vcpu(env);
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