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target/arm: Tidy trans_LD1R_zpri

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Move the variable declarations to the top of the function,
but do not create a new label before sve_access_check.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2020-06-25 20:31:29 -07:00 committed by Peter Maydell
parent 4ac430e1f1
commit c0ed9166b1
1 changed files with 7 additions and 5 deletions
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12
target/arm/translate-sve.c
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@ -4883,17 +4883,19 @@ static bool trans_LD1RQ_zpri(DisasContext *s, arg_rpri_load *a)
/* Load and broadcast element. */ /* Load and broadcast element. */
static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a) static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a)
{ {
if (!sve_access_check(s)) {
return true;
}
unsigned vsz = vec_full_reg_size(s); unsigned vsz = vec_full_reg_size(s);
unsigned psz = pred_full_reg_size(s); unsigned psz = pred_full_reg_size(s);
unsigned esz = dtype_esz[a->dtype]; unsigned esz = dtype_esz[a->dtype];
unsigned msz = dtype_msz(a->dtype); unsigned msz = dtype_msz(a->dtype);
TCGLabel *over = gen_new_label(); TCGLabel *over;
TCGv_i64 temp, clean_addr; TCGv_i64 temp, clean_addr;
if (!sve_access_check(s)) {
return true;
}
over = gen_new_label();
/* If the guarding predicate has no bits set, no load occurs. */ /* If the guarding predicate has no bits set, no load occurs. */
if (psz <= 8) { if (psz <= 8) {
/* Reduce the pred_esz_masks value simply to reduce the /* Reduce the pred_esz_masks value simply to reduce the