accel/tcg: move CF_CLUSTER calculation to curr_cflags
There is nothing special about this compile flag that doesn't mean we can't just compute it with curr_cflags() which we should be using when building a new set. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210224165811.11567-3-alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -249,8 +249,7 @@ void cpu_exec_step_atomic(CPUState *cpu)
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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uint32_t flags;
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uint32_t cflags = 1;
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uint32_t cf_mask = cflags & CF_HASH_MASK;
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uint32_t cflags = (curr_cflags(cpu) & ~CF_PARALLEL) | 1;
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int tb_exit;
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if (sigsetjmp(cpu->jmp_env, 0) == 0) {
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@ -260,7 +259,7 @@ void cpu_exec_step_atomic(CPUState *cpu)
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cpu->running = true;
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
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tb = tb_lookup(cpu, pc, cs_base, flags, cf_mask);
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tb = tb_lookup(cpu, pc, cs_base, flags, cflags);
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if (tb == NULL) {
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mmap_lock();
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@ -497,7 +496,7 @@ static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
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if (replay_has_exception()
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&& cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
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/* Execute just one insn to trigger exception pending in the log */
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cpu->cflags_next_tb = (curr_cflags() & ~CF_USE_ICOUNT) | 1;
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cpu->cflags_next_tb = (curr_cflags(cpu) & ~CF_USE_ICOUNT) | 1;
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}
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#endif
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return false;
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@ -794,7 +793,7 @@ int cpu_exec(CPUState *cpu)
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have CF_INVALID set, -1 is a convenient invalid value that
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does not require tcg headers for cpu_common_reset. */
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if (cflags == -1) {
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cflags = curr_cflags();
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cflags = curr_cflags(cpu);
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} else {
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cpu->cflags_next_tb = -1;
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}
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@ -154,7 +154,7 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env)
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
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tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags());
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tb = tb_lookup(cpu, pc, cs_base, flags, curr_cflags(cpu));
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if (tb == NULL) {
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return tcg_code_gen_epilogue;
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}
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@ -2194,7 +2194,7 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
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if (current_tb_modified) {
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page_collection_unlock(pages);
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | curr_cflags();
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cpu->cflags_next_tb = 1 | curr_cflags(cpu);
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mmap_unlock();
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cpu_loop_exit_noexc(cpu);
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}
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@ -2362,7 +2362,7 @@ static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc)
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#ifdef TARGET_HAS_PRECISE_SMC
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if (current_tb_modified) {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | curr_cflags();
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cpu->cflags_next_tb = 1 | curr_cflags(cpu);
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return true;
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}
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#endif
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@ -2438,7 +2438,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
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* operations only (which execute after completion) so we don't
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* double instrument the instruction.
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*/
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cpu->cflags_next_tb = curr_cflags() | CF_MEMI_ONLY | CF_LAST_IO | n;
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cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_LAST_IO | n;
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qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
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"cpu_io_recompile: rewound execution of TB to "
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@ -519,10 +519,12 @@ static inline uint32_t tb_cflags(const TranslationBlock *tb)
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}
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/* current cflags for hashing/comparison */
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static inline uint32_t curr_cflags(void)
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static inline uint32_t curr_cflags(CPUState *cpu)
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{
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return (parallel_cpus ? CF_PARALLEL : 0)
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| (icount_enabled() ? CF_USE_ICOUNT : 0);
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uint32_t cflags = deposit32(0, CF_CLUSTER_SHIFT, 8, cpu->cluster_index);
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cflags |= parallel_cpus ? CF_PARALLEL : 0;
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cflags |= icount_enabled() ? CF_USE_ICOUNT : 0;
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return cflags;
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}
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/* TranslationBlock invalidate API */
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@ -27,9 +27,6 @@ static inline TranslationBlock *tb_lookup(CPUState *cpu, target_ulong pc,
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hash = tb_jmp_cache_hash_func(pc);
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tb = qatomic_rcu_read(&cpu->tb_jmp_cache[hash]);
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cf_mask &= ~CF_CLUSTER_MASK;
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cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT;
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if (likely(tb &&
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tb->pc == pc &&
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tb->cs_base == cs_base &&
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@ -937,7 +937,7 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
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cpu_loop_exit_restore(cpu, ra);
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} else {
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/* Force execution of one insn next time. */
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cpu->cflags_next_tb = 1 | curr_cflags();
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cpu->cflags_next_tb = 1 | curr_cflags(cpu);
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mmap_unlock();
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if (ra) {
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cpu_restore_state(cpu, ra, true);
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