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tcg/ppc: Implement field extraction opcodes

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Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2016-10-14 14:18:03 -05:00
parent befbb3ced5
commit c05021c3c8
2 changed files with 12 additions and 2 deletions
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4
tcg/ppc/tcg-target.h
View File

@ -69,7 +69,7 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i32 1 #define TCG_TARGET_HAS_nand_i32 1
#define TCG_TARGET_HAS_nor_i32 1 #define TCG_TARGET_HAS_nor_i32 1
#define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_extract_i32 1
#define TCG_TARGET_HAS_sextract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0
#define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_mulu2_i32 0 #define TCG_TARGET_HAS_mulu2_i32 0
@ -102,7 +102,7 @@ typedef enum {
#define TCG_TARGET_HAS_nand_i64 1 #define TCG_TARGET_HAS_nand_i64 1
#define TCG_TARGET_HAS_nor_i64 1 #define TCG_TARGET_HAS_nor_i64 1
#define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_extract_i64 1
#define TCG_TARGET_HAS_sextract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0
#define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_add2_i64 1

10
tcg/ppc/tcg-target.inc.c
View File

@ -2396,6 +2396,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
} }
break; break;
case INDEX_op_extract_i32:
tcg_out_rlw(s, RLWINM, args[0], args[1],
32 - args[2], 32 - args[3], 31);
break;
case INDEX_op_extract_i64:
tcg_out_rld(s, RLDICL, args[0], args[1], 64 - args[2], 64 - args[3]);
break;
case INDEX_op_movcond_i32: case INDEX_op_movcond_i32:
tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2], tcg_out_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], args[2],
args[3], args[4], const_args[2]); args[3], args[4], const_args[2]);
@ -2530,6 +2538,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } }, { INDEX_op_movcond_i32, { "r", "r", "ri", "rZ", "rZ" } },
{ INDEX_op_deposit_i32, { "r", "0", "rZ" } }, { INDEX_op_deposit_i32, { "r", "0", "rZ" } },
{ INDEX_op_extract_i32, { "r", "r" } },
{ INDEX_op_muluh_i32, { "r", "r", "r" } }, { INDEX_op_muluh_i32, { "r", "r", "r" } },
{ INDEX_op_mulsh_i32, { "r", "r", "r" } }, { INDEX_op_mulsh_i32, { "r", "r", "r" } },
@ -2585,6 +2594,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } }, { INDEX_op_movcond_i64, { "r", "r", "ri", "rZ", "rZ" } },
{ INDEX_op_deposit_i64, { "r", "0", "rZ" } }, { INDEX_op_deposit_i64, { "r", "0", "rZ" } },
{ INDEX_op_extract_i64, { "r", "r" } },
{ INDEX_op_mulsh_i64, { "r", "r", "r" } }, { INDEX_op_mulsh_i64, { "r", "r", "r" } },
{ INDEX_op_muluh_i64, { "r", "r", "r" } }, { INDEX_op_muluh_i64, { "r", "r", "r" } },