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ich9: Document why cannot_instantiate_with_device_add_yet

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An ICH9 southbridge contains several PCI devices, some of them with
multiple functions.  We model each function as a separate qdev.  Two
of them need some special wiring set up in pc_q35_init() to work: the
LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Markus Armbruster 2013-11-28 17:26:59 +01:00 committed by Andreas Färber
parent 08c58f92f6
commit bfa6dfd070
2 changed files with 10 additions and 3 deletions
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6
hw/i2c/smbus_ich9.c
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@ -97,11 +97,15 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
k->revision = ICH9_A2_SMB_REVISION; k->revision = ICH9_A2_SMB_REVISION;
k->class_id = PCI_CLASS_SERIAL_SMBUS; k->class_id = PCI_CLASS_SERIAL_SMBUS;
dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
dc->vmsd = &vmstate_ich9_smbus; dc->vmsd = &vmstate_ich9_smbus;
dc->desc = "ICH9 SMBUS Bridge"; dc->desc = "ICH9 SMBUS Bridge";
k->init = ich9_smbus_initfn; k->init = ich9_smbus_initfn;
k->config_write = ich9_smbus_write_config; k->config_write = ich9_smbus_write_config;
/*
* Reason: part of ICH9 southbridge, needs to be wired up by
* pc_q35_init()
*/
dc->cannot_instantiate_with_device_add_yet = true;
} }
i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base) i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)

7
hw/isa/lpc_ich9.c
View File

@ -644,14 +644,17 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data)
dc->reset = ich9_lpc_reset; dc->reset = ich9_lpc_reset;
k->init = ich9_lpc_initfn; k->init = ich9_lpc_initfn;
dc->vmsd = &vmstate_ich9_lpc; dc->vmsd = &vmstate_ich9_lpc;
dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */
k->config_write = ich9_lpc_config_write; k->config_write = ich9_lpc_config_write;
dc->desc = "ICH9 LPC bridge"; dc->desc = "ICH9 LPC bridge";
k->vendor_id = PCI_VENDOR_ID_INTEL; k->vendor_id = PCI_VENDOR_ID_INTEL;
k->device_id = PCI_DEVICE_ID_INTEL_ICH9_8; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_8;
k->revision = ICH9_A2_LPC_REVISION; k->revision = ICH9_A2_LPC_REVISION;
k->class_id = PCI_CLASS_BRIDGE_ISA; k->class_id = PCI_CLASS_BRIDGE_ISA;
/*
* Reason: part of ICH9 southbridge, needs to be wired up by
* pc_q35_init()
*/
dc->cannot_instantiate_with_device_add_yet = true;
} }
static const TypeInfo ich9_lpc_info = { static const TypeInfo ich9_lpc_info = {