target-ppc: Explain why the whole TLB is flushed on SR write
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6947 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -2009,6 +2009,8 @@ void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
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#endif
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if (env->sr[srnum] != value) {
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env->sr[srnum] = value;
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/* Invalidating 256MB of virtual memory in 4kB pages is way longer than
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flusing the whole TLB. */
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#if !defined(FLUSH_ALL_TLBS) && 0
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{
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target_ulong page, end;
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