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target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures

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In v8.1M, vector table fetch failures don't set HFSR.FORCED (see rule
R_LLRP).  (In previous versions of the architecture this was either
required or IMPDEF.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-18-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-11-19 21:56:06 +00:00
parent a59b1ed618
commit be9500bb17
1 changed files with 5 additions and 1 deletions
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6
target/arm/m_helper.c
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@ -722,11 +722,15 @@ load_fail:
* The HardFault is Secure if BFHFNMINS is 0 (meaning that all HFs are
* secure); otherwise it targets the same security state as the
* underlying exception.
* In v8.1M HardFaults from vector table fetch fails don't set FORCED.
*/
if (!(cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) {
exc_secure = true;
}
env->v7m.hfsr |= R_V7M_HFSR_VECTTBL_MASK | R_V7M_HFSR_FORCED_MASK;
env->v7m.hfsr |= R_V7M_HFSR_VECTTBL_MASK;
if (!arm_feature(env, ARM_FEATURE_V8_1M)) {
env->v7m.hfsr |= R_V7M_HFSR_FORCED_MASK;
}
armv7m_nvic_set_pending_derived(env->nvic, ARMV7M_EXCP_HARD, exc_secure);
return false;
}