mirror of https://gitlab.com/qemu-project/qemu
target/sh4: Let get_physical_address() use MMUAccessType access_type
superh_cpu_tlb_fill() already provides a access_type variable of type MMUAccessType, and it is passed along, but casted as integer and renamed 'rw'. Simply replace 'int rw' by 'MMUAccessType access_type'. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210127232151.3523581-5-f4bug@amsat.org>
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@ -331,14 +331,14 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid
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*/
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*/
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static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
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static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
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int *prot, target_ulong address,
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int *prot, target_ulong address,
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int rw)
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MMUAccessType access_type)
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{
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{
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int use_asid, n;
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int use_asid, n;
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tlb_t *matching = NULL;
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tlb_t *matching = NULL;
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use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
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use_asid = !(env->mmucr & MMUCR_SV) || !(env->sr & (1u << SR_MD));
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if (rw == MMU_INST_FETCH) {
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if (access_type == MMU_INST_FETCH) {
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n = find_itlb_entry(env, address, use_asid);
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n = find_itlb_entry(env, address, use_asid);
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if (n >= 0) {
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if (n >= 0) {
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matching = &env->itlb[n];
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matching = &env->itlb[n];
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@ -371,11 +371,11 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
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if (n >= 0) {
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if (n >= 0) {
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matching = &env->utlb[n];
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matching = &env->utlb[n];
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if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
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if (!(env->sr & (1u << SR_MD)) && !(matching->pr & 2)) {
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n = (rw == MMU_DATA_STORE)
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n = (access_type == MMU_DATA_STORE)
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? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
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? MMU_DTLB_VIOLATION_WRITE : MMU_DTLB_VIOLATION_READ;
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} else if ((rw == MMU_DATA_STORE) && !(matching->pr & 1)) {
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} else if ((access_type == MMU_DATA_STORE) && !(matching->pr & 1)) {
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n = MMU_DTLB_VIOLATION_WRITE;
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n = MMU_DTLB_VIOLATION_WRITE;
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} else if ((rw == MMU_DATA_STORE) && !matching->d) {
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} else if ((access_type == MMU_DATA_STORE) && !matching->d) {
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n = MMU_DTLB_INITIAL_WRITE;
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n = MMU_DTLB_INITIAL_WRITE;
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} else {
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} else {
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*prot = PAGE_READ;
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*prot = PAGE_READ;
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@ -384,7 +384,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
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}
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}
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}
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}
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} else if (n == MMU_DTLB_MISS) {
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} else if (n == MMU_DTLB_MISS) {
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n = (rw == MMU_DATA_STORE)
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n = (access_type == MMU_DATA_STORE)
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? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
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? MMU_DTLB_MISS_WRITE : MMU_DTLB_MISS_READ;
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}
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}
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}
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}
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@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical,
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static int get_physical_address(CPUSH4State * env, target_ulong * physical,
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static int get_physical_address(CPUSH4State * env, target_ulong * physical,
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int *prot, target_ulong address,
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int *prot, target_ulong address,
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int rw)
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MMUAccessType access_type)
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{
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{
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/* P1, P2 and P4 areas do not use translation */
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/* P1, P2 and P4 areas do not use translation */
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if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
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if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) {
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@ -406,9 +406,9 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
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&& (address < 0xe0000000 || address >= 0xe4000000)) {
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&& (address < 0xe0000000 || address >= 0xe4000000)) {
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/* Unauthorized access in user mode (only store queues are available) */
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/* Unauthorized access in user mode (only store queues are available) */
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qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
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qemu_log_mask(LOG_GUEST_ERROR, "Unauthorized access\n");
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if (rw == MMU_DATA_LOAD) {
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if (access_type == MMU_DATA_LOAD) {
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return MMU_DADDR_ERROR_READ;
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return MMU_DADDR_ERROR_READ;
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} else if (rw == MMU_DATA_STORE) {
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} else if (access_type == MMU_DATA_STORE) {
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return MMU_DADDR_ERROR_WRITE;
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return MMU_DADDR_ERROR_WRITE;
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} else {
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} else {
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return MMU_IADDR_ERROR;
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return MMU_IADDR_ERROR;
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@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical,
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}
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}
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/* We need to resort to the MMU */
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/* We need to resort to the MMU */
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return get_mmu_address(env, physical, prot, address, rw);
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return get_mmu_address(env, physical, prot, address, access_type);
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}
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}
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hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
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