cpu: Use QTAILQ for CPU list
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
parent
27013bf20d
commit
bdc44640cb
49
cpus.c
49
cpus.c
@ -86,7 +86,7 @@ static bool all_cpu_threads_idle(void)
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{
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CPUState *cpu;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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if (!cpu_thread_is_idle(cpu)) {
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return false;
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}
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@ -416,7 +416,7 @@ void hw_error(const char *fmt, ...)
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fprintf(stderr, "qemu: hardware error: ");
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vfprintf(stderr, fmt, ap);
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fprintf(stderr, "\n");
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);
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cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU);
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}
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@ -428,7 +428,7 @@ void cpu_synchronize_all_states(void)
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{
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CPUState *cpu;
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for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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cpu_synchronize_state(cpu);
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}
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}
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@ -437,7 +437,7 @@ void cpu_synchronize_all_post_reset(void)
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{
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CPUState *cpu;
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for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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cpu_synchronize_post_reset(cpu);
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}
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}
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@ -446,7 +446,7 @@ void cpu_synchronize_all_post_init(void)
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{
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CPUState *cpu;
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for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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cpu_synchronize_post_init(cpu);
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}
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}
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@ -760,7 +760,7 @@ static void qemu_tcg_wait_io_event(void)
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qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
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}
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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qemu_wait_io_event_common(cpu);
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}
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}
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@ -872,11 +872,11 @@ static void *qemu_tcg_cpu_thread_fn(void *arg)
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qemu_cond_signal(&qemu_cpu_cond);
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/* wait for initial kick-off after machine start */
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while (first_cpu->stopped) {
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while (QTAILQ_FIRST(&cpus)->stopped) {
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qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
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/* process any pending work */
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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qemu_wait_io_event_common(cpu);
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}
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}
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@ -991,13 +991,12 @@ void qemu_mutex_unlock_iothread(void)
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static int all_vcpus_paused(void)
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{
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CPUState *cpu = first_cpu;
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CPUState *cpu;
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while (cpu) {
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CPU_FOREACH(cpu) {
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if (!cpu->stopped) {
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return 0;
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}
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cpu = cpu->next_cpu;
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}
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return 1;
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@ -1005,23 +1004,20 @@ static int all_vcpus_paused(void)
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void pause_all_vcpus(void)
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{
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CPUState *cpu = first_cpu;
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CPUState *cpu;
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qemu_clock_enable(QEMU_CLOCK_VIRTUAL, false);
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while (cpu) {
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CPU_FOREACH(cpu) {
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cpu->stop = true;
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qemu_cpu_kick(cpu);
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cpu = cpu->next_cpu;
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}
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if (qemu_in_vcpu_thread()) {
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cpu_stop_current();
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if (!kvm_enabled()) {
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cpu = first_cpu;
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while (cpu) {
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CPU_FOREACH(cpu) {
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cpu->stop = false;
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cpu->stopped = true;
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cpu = cpu->next_cpu;
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}
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return;
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}
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@ -1029,10 +1025,8 @@ void pause_all_vcpus(void)
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while (!all_vcpus_paused()) {
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qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
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cpu = first_cpu;
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while (cpu) {
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CPU_FOREACH(cpu) {
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qemu_cpu_kick(cpu);
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cpu = cpu->next_cpu;
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}
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}
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}
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@ -1046,12 +1040,11 @@ void cpu_resume(CPUState *cpu)
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void resume_all_vcpus(void)
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{
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CPUState *cpu = first_cpu;
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CPUState *cpu;
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qemu_clock_enable(QEMU_CLOCK_VIRTUAL, true);
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while (cpu) {
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CPU_FOREACH(cpu) {
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cpu_resume(cpu);
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cpu = cpu->next_cpu;
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}
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}
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@ -1215,7 +1208,7 @@ static void tcg_exec_all(void)
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if (next_cpu == NULL) {
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next_cpu = first_cpu;
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}
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for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
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for (; next_cpu != NULL && !exit_request; next_cpu = CPU_NEXT(next_cpu)) {
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CPUState *cpu = next_cpu;
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CPUArchState *env = cpu->env_ptr;
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@ -1240,7 +1233,7 @@ void set_numa_modes(void)
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CPUState *cpu;
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int i;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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for (i = 0; i < nb_numa_nodes; i++) {
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if (test_bit(cpu->cpu_index, node_cpumask[i])) {
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cpu->numa_node = i;
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@ -1262,7 +1255,7 @@ CpuInfoList *qmp_query_cpus(Error **errp)
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CpuInfoList *head = NULL, *cur_item = NULL;
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CPUState *cpu;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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CpuInfoList *info;
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#if defined(TARGET_I386)
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X86CPU *x86_cpu = X86_CPU(cpu);
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@ -1391,7 +1384,7 @@ void qmp_inject_nmi(Error **errp)
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#if defined(TARGET_I386)
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CPUState *cs;
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for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
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CPU_FOREACH(cs) {
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X86CPU *cpu = X86_CPU(cs);
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CPUX86State *env = &cpu->env;
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@ -1405,7 +1398,7 @@ void qmp_inject_nmi(Error **errp)
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CPUState *cs;
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S390CPU *cpu;
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for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
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CPU_FOREACH(cs) {
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cpu = S390_CPU(cs);
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if (cpu->env.cpu_num == monitor_get_cpu_index()) {
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if (s390_cpu_restart(S390_CPU(cs)) == -1) {
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2
cputlb.c
2
cputlb.c
@ -189,7 +189,7 @@ void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length)
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CPUState *cpu;
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CPUArchState *env;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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int mmu_idx;
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env = cpu->env_ptr;
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10
dump.c
10
dump.c
@ -277,7 +277,7 @@ static int write_elf64_notes(DumpState *s)
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int ret;
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int id;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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id = cpu_index(cpu);
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ret = cpu_write_elf64_note(fd_write_vmcore, cpu, id, s);
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if (ret < 0) {
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@ -286,7 +286,7 @@ static int write_elf64_notes(DumpState *s)
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}
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}
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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ret = cpu_write_elf64_qemunote(fd_write_vmcore, cpu, s);
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if (ret < 0) {
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dump_error(s, "dump: failed to write CPU status.\n");
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@ -327,7 +327,7 @@ static int write_elf32_notes(DumpState *s)
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int ret;
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int id;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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id = cpu_index(cpu);
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ret = cpu_write_elf32_note(fd_write_vmcore, cpu, id, s);
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if (ret < 0) {
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@ -336,7 +336,7 @@ static int write_elf32_notes(DumpState *s)
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}
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}
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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ret = cpu_write_elf32_qemunote(fd_write_vmcore, cpu, s);
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if (ret < 0) {
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dump_error(s, "dump: failed to write CPU status.\n");
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@ -734,7 +734,7 @@ static int dump_init(DumpState *s, int fd, bool paging, bool has_filter,
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*/
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cpu_synchronize_all_states();
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nr_cpus = 0;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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nr_cpus++;
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}
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26
exec.c
26
exec.c
@ -69,7 +69,7 @@ static MemoryRegion io_mem_unassigned;
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#endif
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CPUState *first_cpu;
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struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus);
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/* current CPU in the current thread. It is only valid inside
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cpu_exec() */
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DEFINE_TLS(CPUState *, current_cpu);
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@ -351,26 +351,23 @@ const VMStateDescription vmstate_cpu_common = {
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CPUState *qemu_get_cpu(int index)
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{
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CPUState *cpu = first_cpu;
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CPUState *cpu;
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while (cpu) {
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CPU_FOREACH(cpu) {
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if (cpu->cpu_index == index) {
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break;
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return cpu;
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}
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cpu = cpu->next_cpu;
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}
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return cpu;
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return NULL;
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}
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void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data)
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{
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CPUState *cpu;
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cpu = first_cpu;
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while (cpu) {
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CPU_FOREACH(cpu) {
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func(cpu, data);
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cpu = cpu->next_cpu;
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}
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}
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@ -378,17 +375,14 @@ void cpu_exec_init(CPUArchState *env)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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CPUClass *cc = CPU_GET_CLASS(cpu);
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CPUState **pcpu;
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CPUState *some_cpu;
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int cpu_index;
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#if defined(CONFIG_USER_ONLY)
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cpu_list_lock();
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#endif
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cpu->next_cpu = NULL;
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pcpu = &first_cpu;
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cpu_index = 0;
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while (*pcpu != NULL) {
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pcpu = &(*pcpu)->next_cpu;
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CPU_FOREACH(some_cpu) {
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cpu_index++;
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}
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cpu->cpu_index = cpu_index;
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@ -398,7 +392,7 @@ void cpu_exec_init(CPUArchState *env)
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#ifndef CONFIG_USER_ONLY
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cpu->thread_id = qemu_get_thread_id();
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#endif
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*pcpu = cpu;
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QTAILQ_INSERT_TAIL(&cpus, cpu, node);
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#if defined(CONFIG_USER_ONLY)
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cpu_list_unlock();
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#endif
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@ -1762,7 +1756,7 @@ static void tcg_commit(MemoryListener *listener)
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/* since each CPU stores ram addresses in its TLB cache, we must
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reset the modified entries */
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/* XXX: slow ! */
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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CPUArchState *env = cpu->env_ptr;
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tlb_flush(env, 1);
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14
gdbstub.c
14
gdbstub.c
@ -648,7 +648,7 @@ static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
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switch (type) {
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case GDB_BREAKPOINT_SW:
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case GDB_BREAKPOINT_HW:
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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env = cpu->env_ptr;
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err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
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if (err)
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@ -659,7 +659,7 @@ static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
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case GDB_WATCHPOINT_WRITE:
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case GDB_WATCHPOINT_READ:
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case GDB_WATCHPOINT_ACCESS:
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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env = cpu->env_ptr;
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err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
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NULL);
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@ -686,7 +686,7 @@ static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
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switch (type) {
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case GDB_BREAKPOINT_SW:
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case GDB_BREAKPOINT_HW:
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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env = cpu->env_ptr;
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err = cpu_breakpoint_remove(env, addr, BP_GDB);
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if (err)
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@ -697,7 +697,7 @@ static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
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case GDB_WATCHPOINT_WRITE:
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case GDB_WATCHPOINT_READ:
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case GDB_WATCHPOINT_ACCESS:
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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env = cpu->env_ptr;
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err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
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if (err)
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@ -720,7 +720,7 @@ static void gdb_breakpoint_remove_all(void)
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return;
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}
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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env = cpu->env_ptr;
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cpu_breakpoint_remove_all(env, BP_GDB);
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#ifndef CONFIG_USER_ONLY
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@ -744,7 +744,7 @@ static CPUState *find_cpu(uint32_t thread_id)
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{
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CPUState *cpu;
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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if (cpu_index(cpu) == thread_id) {
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return cpu;
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}
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@ -1070,7 +1070,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
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if (s->query_cpu) {
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snprintf(buf, sizeof(buf), "m%x", cpu_index(s->query_cpu));
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put_packet(s, buf);
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s->query_cpu = s->query_cpu->next_cpu;
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s->query_cpu = CPU_NEXT(s->query_cpu);
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} else
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put_packet(s, "l");
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break;
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@ -468,7 +468,7 @@ void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
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}
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info->is_linux = is_linux;
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for (; cs; cs = cs->next_cpu) {
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for (; cs; cs = CPU_NEXT(cs)) {
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cpu = ARM_CPU(cs);
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cpu->env.boot_info = info;
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qemu_register_reset(do_cpu_reset, cpu);
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@ -59,7 +59,7 @@ static void kvmclock_vm_state_change(void *opaque, int running,
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if (!cap_clock_ctrl) {
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return;
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}
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for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
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CPU_FOREACH(cpu) {
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ret = kvm_vcpu_ioctl(cpu, KVM_KVMCLOCK_CTRL, 0);
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if (ret) {
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if (ret != -EINVAL) {
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@ -498,7 +498,7 @@ static void vapic_enable_tpr_reporting(bool enable)
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X86CPU *cpu;
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CPUX86State *env;
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for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
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CPU_FOREACH(cs) {
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cpu = X86_CPU(cs);
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env = &cpu->env;
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info.apic = env->apic_state;
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@ -191,13 +191,12 @@ static void pic_irq_request(void *opaque, int irq, int level)
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DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
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if (env->apic_state) {
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while (cs) {
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CPU_FOREACH(cs) {
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cpu = X86_CPU(cs);
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env = &cpu->env;
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if (apic_accept_pic_intr(env->apic_state)) {
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apic_deliver_pic_intr(env->apic_state, level);
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}
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cs = cs->next_cpu;
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}
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} else {
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if (level) {
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@ -540,7 +540,7 @@ static DeviceState *ppce500_init_mpic_kvm(PPCE500Params *params,
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return NULL;
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}
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for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
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CPU_FOREACH(cs) {
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if (kvm_openpic_connect_vcpu(dev, cs)) {
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fprintf(stderr, "%s: failed to connect vcpu to irqchip\n",
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__func__);
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||||
|
@ -443,7 +443,7 @@ void ppce500_set_mpic_proxy(bool enabled)
|
||||
{
|
||||
CPUState *cs;
|
||||
|
||||
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
||||
CPU_FOREACH(cs) {
|
||||
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
||||
|
||||
cpu->env.mpic_proxy = enabled;
|
||||
|
@ -187,7 +187,7 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
|
||||
|
||||
assert(spapr->cpu_model);
|
||||
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
uint32_t associativity[] = {cpu_to_be32(0x5),
|
||||
cpu_to_be32(0x0),
|
||||
cpu_to_be32(0x0),
|
||||
@ -351,7 +351,7 @@ static void *spapr_create_fdt_skel(const char *cpu_model,
|
||||
/* This is needed during FDT finalization */
|
||||
spapr->cpu_model = g_strdup(modelname);
|
||||
|
||||
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
||||
CPU_FOREACH(cs) {
|
||||
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
||||
CPUPPCState *env = &cpu->env;
|
||||
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
|
||||
|
@ -679,7 +679,7 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
|
||||
|
||||
switch (mflags) {
|
||||
case H_SET_MODE_ENDIAN_BIG:
|
||||
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
||||
CPU_FOREACH(cs) {
|
||||
PowerPCCPU *cp = POWERPC_CPU(cs);
|
||||
CPUPPCState *env = &cp->env;
|
||||
env->spr[SPR_LPCR] &= ~LPCR_ILE;
|
||||
@ -688,7 +688,7 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
|
||||
break;
|
||||
|
||||
case H_SET_MODE_ENDIAN_LITTLE:
|
||||
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
||||
CPU_FOREACH(cs) {
|
||||
PowerPCCPU *cp = POWERPC_CPU(cs);
|
||||
CPUPPCState *env = &cp->env;
|
||||
env->spr[SPR_LPCR] |= LPCR_ILE;
|
||||
|
@ -23,6 +23,7 @@
|
||||
#include <signal.h>
|
||||
#include "hw/qdev-core.h"
|
||||
#include "exec/hwaddr.h"
|
||||
#include "qemu/queue.h"
|
||||
#include "qemu/thread.h"
|
||||
#include "qemu/tls.h"
|
||||
#include "qemu/typedefs.h"
|
||||
@ -190,7 +191,7 @@ struct CPUState {
|
||||
struct GDBRegisterState *gdb_regs;
|
||||
int gdb_num_regs;
|
||||
int gdb_num_g_regs;
|
||||
CPUState *next_cpu;
|
||||
QTAILQ_ENTRY(CPUState) node;
|
||||
|
||||
int kvm_fd;
|
||||
bool kvm_vcpu_dirty;
|
||||
@ -202,7 +203,13 @@ struct CPUState {
|
||||
uint32_t halted; /* used by alpha, cris, ppc TCG */
|
||||
};
|
||||
|
||||
extern CPUState *first_cpu;
|
||||
QTAILQ_HEAD(CPUTailQ, CPUState);
|
||||
extern struct CPUTailQ cpus;
|
||||
#define CPU_NEXT(cpu) QTAILQ_NEXT(cpu, node)
|
||||
#define CPU_FOREACH(cpu) QTAILQ_FOREACH(cpu, &cpus, node)
|
||||
#define CPU_FOREACH_SAFE(cpu, next_cpu) \
|
||||
QTAILQ_FOREACH_SAFE(cpu, &cpus, node, next_cpu)
|
||||
#define first_cpu QTAILQ_FIRST(&cpus)
|
||||
|
||||
DECLARE_TLS(CPUState *, current_cpu);
|
||||
#define current_cpu tls_var(current_cpu)
|
||||
|
@ -1925,7 +1925,7 @@ int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr,
|
||||
}
|
||||
}
|
||||
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
err = kvm_update_guest_debug(cpu, 0);
|
||||
if (err) {
|
||||
return err;
|
||||
@ -1965,7 +1965,7 @@ int kvm_remove_breakpoint(CPUState *cpu, target_ulong addr,
|
||||
}
|
||||
}
|
||||
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
err = kvm_update_guest_debug(cpu, 0);
|
||||
if (err) {
|
||||
return err;
|
||||
@ -1982,7 +1982,7 @@ void kvm_remove_all_breakpoints(CPUState *cpu)
|
||||
QTAILQ_FOREACH_SAFE(bp, &s->kvm_sw_breakpoints, entry, next) {
|
||||
if (kvm_arch_remove_sw_breakpoint(cpu, bp) != 0) {
|
||||
/* Try harder to find a CPU that currently sees the breakpoint. */
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
if (kvm_arch_remove_sw_breakpoint(cpu, bp) == 0) {
|
||||
break;
|
||||
}
|
||||
@ -1993,7 +1993,7 @@ void kvm_remove_all_breakpoints(CPUState *cpu)
|
||||
}
|
||||
kvm_arch_remove_all_hw_breakpoints();
|
||||
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
kvm_update_guest_debug(cpu, 0);
|
||||
}
|
||||
}
|
||||
|
@ -2668,7 +2668,7 @@ static int fill_note_info(struct elf_note_info *info,
|
||||
|
||||
/* read and fill status of all threads */
|
||||
cpu_list_lock();
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
if (cpu == thread_cpu) {
|
||||
continue;
|
||||
}
|
||||
|
@ -117,10 +117,14 @@ void fork_end(int child)
|
||||
{
|
||||
mmap_fork_end(child);
|
||||
if (child) {
|
||||
CPUState *cpu, *next_cpu;
|
||||
/* Child processes created by fork() only have a single thread.
|
||||
Discard information about the parent threads. */
|
||||
first_cpu = thread_cpu;
|
||||
first_cpu->next_cpu = NULL;
|
||||
CPU_FOREACH_SAFE(cpu, next_cpu) {
|
||||
if (cpu != thread_cpu) {
|
||||
QTAILQ_REMOVE(&cpus, thread_cpu, node);
|
||||
}
|
||||
}
|
||||
pending_cpus = 0;
|
||||
pthread_mutex_init(&exclusive_lock, NULL);
|
||||
pthread_mutex_init(&cpu_list_mutex, NULL);
|
||||
@ -154,7 +158,7 @@ static inline void start_exclusive(void)
|
||||
|
||||
pending_cpus = 1;
|
||||
/* Make all other cpus stop executing. */
|
||||
for (other_cpu = first_cpu; other_cpu; other_cpu = other_cpu->next_cpu) {
|
||||
CPU_FOREACH(other_cpu) {
|
||||
if (other_cpu->running) {
|
||||
pending_cpus++;
|
||||
cpu_exit(other_cpu);
|
||||
|
@ -5113,25 +5113,12 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
|
||||
Do thread termination if we have more then one thread. */
|
||||
/* FIXME: This probably breaks if a signal arrives. We should probably
|
||||
be disabling signals. */
|
||||
if (first_cpu->next_cpu) {
|
||||
if (CPU_NEXT(first_cpu)) {
|
||||
TaskState *ts;
|
||||
CPUState **lastp;
|
||||
CPUState *p;
|
||||
|
||||
cpu_list_lock();
|
||||
lastp = &first_cpu;
|
||||
p = first_cpu;
|
||||
while (p && p != cpu) {
|
||||
lastp = &p->next_cpu;
|
||||
p = p->next_cpu;
|
||||
}
|
||||
/* If we didn't find the CPU for this thread then something is
|
||||
horribly wrong. */
|
||||
if (!p) {
|
||||
abort();
|
||||
}
|
||||
/* Remove the CPU from the list. */
|
||||
*lastp = p->next_cpu;
|
||||
QTAILQ_REMOVE(&cpus, cpu, node);
|
||||
cpu_list_unlock();
|
||||
ts = ((CPUArchState *)cpu_env)->opaque;
|
||||
if (ts->child_tidptr) {
|
||||
|
@ -270,7 +270,7 @@ static CPUState *find_paging_enabled_cpu(CPUState *start_cpu)
|
||||
{
|
||||
CPUState *cpu;
|
||||
|
||||
for (cpu = start_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
if (cpu_paging_enabled(cpu)) {
|
||||
return cpu;
|
||||
}
|
||||
@ -289,7 +289,8 @@ void qemu_get_guest_memory_mapping(MemoryMappingList *list,
|
||||
|
||||
first_paging_enabled_cpu = find_paging_enabled_cpu(first_cpu);
|
||||
if (first_paging_enabled_cpu) {
|
||||
for (cpu = first_paging_enabled_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
for (cpu = first_paging_enabled_cpu; cpu != NULL;
|
||||
cpu = CPU_NEXT(cpu)) {
|
||||
Error *err = NULL;
|
||||
cpu_get_memory_mapping(cpu, list, &err);
|
||||
if (err) {
|
||||
|
@ -2002,7 +2002,7 @@ static void do_info_numa(Monitor *mon, const QDict *qdict)
|
||||
monitor_printf(mon, "%d nodes\n", nb_numa_nodes);
|
||||
for (i = 0; i < nb_numa_nodes; i++) {
|
||||
monitor_printf(mon, "node %d cpus:", i);
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
if (cpu->numa_node == i) {
|
||||
monitor_printf(mon, " %d", cpu->cpu_index);
|
||||
}
|
||||
|
@ -1231,8 +1231,7 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
|
||||
params.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_RIPV;
|
||||
params.addr = 0;
|
||||
params.misc = 0;
|
||||
for (other_cs = first_cpu; other_cs != NULL;
|
||||
other_cs = other_cs->next_cpu) {
|
||||
CPU_FOREACH(other_cs) {
|
||||
if (other_cs == cs) {
|
||||
continue;
|
||||
}
|
||||
|
@ -610,7 +610,7 @@ void helper_mwait(CPUX86State *env, int next_eip_addend)
|
||||
cpu = x86_env_get_cpu(env);
|
||||
cs = CPU(cpu);
|
||||
/* XXX: not complete but not completely erroneous */
|
||||
if (cs->cpu_index != 0 || cs->next_cpu != NULL) {
|
||||
if (cs->cpu_index != 0 || CPU_NEXT(cs) != NULL) {
|
||||
/* more than one CPU: do not sleep because another CPU may
|
||||
wake this one */
|
||||
} else {
|
||||
|
@ -1699,15 +1699,14 @@ target_ulong helper_dvpe(CPUMIPSState *env)
|
||||
CPUState *other_cs = first_cpu;
|
||||
target_ulong prev = env->mvp->CP0_MVPControl;
|
||||
|
||||
do {
|
||||
CPU_FOREACH(other_cs) {
|
||||
MIPSCPU *other_cpu = MIPS_CPU(other_cs);
|
||||
/* Turn off all VPEs except the one executing the dvpe. */
|
||||
if (&other_cpu->env != env) {
|
||||
other_cpu->env.mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP);
|
||||
mips_vpe_sleep(other_cpu);
|
||||
}
|
||||
other_cs = other_cs->next_cpu;
|
||||
} while (other_cs);
|
||||
}
|
||||
return prev;
|
||||
}
|
||||
|
||||
@ -1716,7 +1715,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
|
||||
CPUState *other_cs = first_cpu;
|
||||
target_ulong prev = env->mvp->CP0_MVPControl;
|
||||
|
||||
do {
|
||||
CPU_FOREACH(other_cs) {
|
||||
MIPSCPU *other_cpu = MIPS_CPU(other_cs);
|
||||
|
||||
if (&other_cpu->env != env
|
||||
@ -1726,8 +1725,7 @@ target_ulong helper_evpe(CPUMIPSState *env)
|
||||
other_cpu->env.mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP);
|
||||
mips_vpe_wake(other_cpu); /* And wake it up. */
|
||||
}
|
||||
other_cs = other_cs->next_cpu;
|
||||
} while (other_cs);
|
||||
}
|
||||
return prev;
|
||||
}
|
||||
#endif /* !CONFIG_USER_ONLY */
|
||||
|
@ -1002,7 +1002,7 @@ void helper_msgsnd(target_ulong rb)
|
||||
return;
|
||||
}
|
||||
|
||||
for (cs = first_cpu; cs != NULL; cs = cs->next_cpu) {
|
||||
CPU_FOREACH(cs) {
|
||||
PowerPCCPU *cpu = POWERPC_CPU(cs);
|
||||
CPUPPCState *cenv = &cpu->env;
|
||||
|
||||
|
@ -183,12 +183,12 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
static void cpu_reset_all(void)
|
||||
{
|
||||
CPUState *cpu;
|
||||
CPUState *cs;
|
||||
S390CPUClass *scc;
|
||||
|
||||
for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
|
||||
scc = S390_CPU_GET_CLASS(CPU(cpu));
|
||||
scc->cpu_reset(CPU(cpu));
|
||||
CPU_FOREACH(cs) {
|
||||
scc = S390_CPU_GET_CLASS(cs);
|
||||
scc->cpu_reset(cs);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -696,7 +696,7 @@ void tb_flush(CPUArchState *env1)
|
||||
}
|
||||
tcg_ctx.tb_ctx.nb_tbs = 0;
|
||||
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
CPUArchState *env = cpu->env_ptr;
|
||||
|
||||
memset(env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *));
|
||||
@ -850,7 +850,7 @@ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
|
||||
|
||||
/* remove the TB from the hash list */
|
||||
h = tb_jmp_cache_hash_func(tb->pc);
|
||||
for (cpu = first_cpu; cpu != NULL; cpu = cpu->next_cpu) {
|
||||
CPU_FOREACH(cpu) {
|
||||
CPUArchState *env = cpu->env_ptr;
|
||||
|
||||
if (env->tb_jmp_cache[h] == tb) {
|
||||
|
Loading…
Reference in New Issue
Block a user