hw/riscv: spike: Remove compile time XLEN checks
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Message-id: ac75037dd58061486de421a0fcd9ac8a92014607.1608142916.git.alistair.francis@wdc.com
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@ -43,17 +43,6 @@
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#include "sysemu/qtest.h"
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#include "sysemu/qtest.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/sysemu.h"
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/*
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* Not like other RISC-V machines that use plain binary bios images,
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* keeping ELF files here was intentional because BIN files don't work
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* for the Spike machine as HTIF emulation depends on ELF parsing.
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*/
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#if defined(TARGET_RISCV32)
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# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.elf"
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#else
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# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.elf"
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#endif
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static const struct MemmapEntry {
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static const struct MemmapEntry {
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hwaddr base;
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hwaddr base;
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hwaddr size;
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hwaddr size;
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@ -64,7 +53,7 @@ static const struct MemmapEntry {
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};
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};
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static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
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static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
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uint64_t mem_size, const char *cmdline)
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uint64_t mem_size, const char *cmdline, bool is_32_bit)
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{
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{
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void *fdt;
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void *fdt;
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uint64_t addr, size;
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uint64_t addr, size;
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@ -115,11 +104,11 @@ static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap,
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cpu_name = g_strdup_printf("/cpus/cpu@%d",
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cpu_name = g_strdup_printf("/cpus/cpu@%d",
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s->soc[socket].hartid_base + cpu);
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s->soc[socket].hartid_base + cpu);
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qemu_fdt_add_subnode(fdt, cpu_name);
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qemu_fdt_add_subnode(fdt, cpu_name);
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#if defined(TARGET_RISCV32)
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if (is_32_bit) {
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qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32");
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qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32");
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#else
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} else {
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qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48");
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qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48");
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#endif
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}
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name = riscv_isa_string(&s->soc[socket].harts[cpu]);
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name = riscv_isa_string(&s->soc[socket].harts[cpu]);
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qemu_fdt_setprop_string(fdt, cpu_name, "riscv,isa", name);
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qemu_fdt_setprop_string(fdt, cpu_name, "riscv,isa", name);
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g_free(name);
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g_free(name);
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@ -254,7 +243,8 @@ static void spike_board_init(MachineState *machine)
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main_mem);
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main_mem);
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/* create device tree */
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/* create device tree */
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create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline);
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create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline,
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riscv_is_32_bit(machine));
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/* boot rom */
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/* boot rom */
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memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom",
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memory_region_init_rom(mask_rom, NULL, "riscv.spike.mrom",
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@ -262,9 +252,22 @@ static void spike_board_init(MachineState *machine)
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memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
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memory_region_add_subregion(system_memory, memmap[SPIKE_MROM].base,
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mask_rom);
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mask_rom);
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firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME,
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/*
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memmap[SPIKE_DRAM].base,
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* Not like other RISC-V machines that use plain binary bios images,
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htif_symbol_callback);
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* keeping ELF files here was intentional because BIN files don't work
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* for the Spike machine as HTIF emulation depends on ELF parsing.
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*/
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if (riscv_is_32_bit(machine)) {
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firmware_end_addr = riscv_find_and_load_firmware(machine,
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"opensbi-riscv32-generic-fw_dynamic.elf",
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memmap[SPIKE_DRAM].base,
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htif_symbol_callback);
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} else {
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firmware_end_addr = riscv_find_and_load_firmware(machine,
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"opensbi-riscv64-generic-fw_dynamic.elf",
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memmap[SPIKE_DRAM].base,
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htif_symbol_callback);
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}
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if (machine->kernel_filename) {
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if (machine->kernel_filename) {
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kernel_start_addr = riscv_calc_kernel_start_addr(machine,
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kernel_start_addr = riscv_calc_kernel_start_addr(machine,
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