target/arm: Add ARM_CP_SME
This will be used for controlling access to SME cpregs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -113,6 +113,11 @@ enum {
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ARM_CP_EL3_NO_EL2_UNDEF = 1 << 16,
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ARM_CP_EL3_NO_EL2_KEEP = 1 << 17,
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ARM_CP_EL3_NO_EL2_C_NZ = 1 << 18,
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/*
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* Flag: Access check for this sysreg is constrained by the
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* ARM pseudocode function CheckSMEAccess().
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*/
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ARM_CP_SME = 1 << 19,
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};
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/*
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@ -1187,6 +1187,22 @@ bool sve_access_check(DisasContext *s)
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return fp_access_check(s);
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}
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/*
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* Check that SME access is enabled, raise an exception if not.
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* Note that this function corresponds to CheckSMEAccess and is
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* only used directly for cpregs.
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*/
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static bool sme_access_check(DisasContext *s)
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{
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if (s->sme_excp_el) {
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gen_exception_insn_el(s, s->pc_curr, EXCP_UDEF,
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syn_smetrap(SME_ET_AccessTrap, false),
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s->sme_excp_el);
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return false;
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}
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return true;
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}
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/*
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* This utility function is for doing register extension with an
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* optional shift. You will likely want to pass a temporary for the
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@ -1958,6 +1974,8 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
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return;
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} else if ((ri->type & ARM_CP_SVE) && !sve_access_check(s)) {
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return;
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} else if ((ri->type & ARM_CP_SME) && !sme_access_check(s)) {
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return;
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}
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if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
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