macio: call dma_memory_unmap() at the end of each DMA transfer
This ensures that the underlying memory is marked dirty once the transfer is complete and resolves cache coherency problems under MacOS 9. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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42bff4772e
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@ -66,8 +66,7 @@ static void pmac_dma_read(BlockBackend *blk,
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DBDMA_io *io = opaque;
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DBDMA_io *io = opaque;
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MACIOIDEState *m = io->opaque;
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MACIOIDEState *m = io->opaque;
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IDEState *s = idebus_active_if(&m->bus);
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IDEState *s = idebus_active_if(&m->bus);
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dma_addr_t dma_addr, dma_len;
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dma_addr_t dma_addr;
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void *mem;
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int64_t sector_num;
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int64_t sector_num;
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int nsector;
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int nsector;
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uint64_t align = BDRV_SECTOR_SIZE;
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uint64_t align = BDRV_SECTOR_SIZE;
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@ -84,9 +83,10 @@ static void pmac_dma_read(BlockBackend *blk,
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sector_num, nsector);
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sector_num, nsector);
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dma_addr = io->addr;
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dma_addr = io->addr;
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dma_len = io->len;
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io->dir = DMA_DIRECTION_FROM_DEVICE;
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mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,
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io->dma_len = io->len;
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DMA_DIRECTION_FROM_DEVICE);
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io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
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io->dir);
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if (offset & (align - 1)) {
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if (offset & (align - 1)) {
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head_bytes = offset & (align - 1);
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head_bytes = offset & (align - 1);
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@ -100,7 +100,7 @@ static void pmac_dma_read(BlockBackend *blk,
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offset = offset & ~(align - 1);
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offset = offset & ~(align - 1);
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}
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}
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qemu_iovec_add(&io->iov, mem, io->len);
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qemu_iovec_add(&io->iov, io->dma_mem, io->len);
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if ((offset + bytes) & (align - 1)) {
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if ((offset + bytes) & (align - 1)) {
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tail_bytes = (offset + bytes) & (align - 1);
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tail_bytes = (offset + bytes) & (align - 1);
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@ -130,8 +130,7 @@ static void pmac_dma_write(BlockBackend *blk,
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DBDMA_io *io = opaque;
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DBDMA_io *io = opaque;
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MACIOIDEState *m = io->opaque;
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MACIOIDEState *m = io->opaque;
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IDEState *s = idebus_active_if(&m->bus);
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IDEState *s = idebus_active_if(&m->bus);
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dma_addr_t dma_addr, dma_len;
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dma_addr_t dma_addr;
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void *mem;
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int64_t sector_num;
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int64_t sector_num;
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int nsector;
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int nsector;
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uint64_t align = BDRV_SECTOR_SIZE;
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uint64_t align = BDRV_SECTOR_SIZE;
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@ -149,9 +148,10 @@ static void pmac_dma_write(BlockBackend *blk,
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sector_num, nsector);
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sector_num, nsector);
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dma_addr = io->addr;
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dma_addr = io->addr;
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dma_len = io->len;
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io->dir = DMA_DIRECTION_TO_DEVICE;
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mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,
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io->dma_len = io->len;
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DMA_DIRECTION_TO_DEVICE);
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io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
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io->dir);
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if (offset & (align - 1)) {
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if (offset & (align - 1)) {
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head_bytes = offset & (align - 1);
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head_bytes = offset & (align - 1);
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@ -163,7 +163,7 @@ static void pmac_dma_write(BlockBackend *blk,
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blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align);
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blk_pread(s->blk, (sector_num << 9), &io->head_remainder, align);
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qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes);
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qemu_iovec_add(&io->iov, &io->head_remainder, head_bytes);
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qemu_iovec_add(&io->iov, mem, io->len);
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qemu_iovec_add(&io->iov, io->dma_mem, io->len);
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bytes += offset & (align - 1);
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bytes += offset & (align - 1);
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offset = offset & ~(align - 1);
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offset = offset & ~(align - 1);
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@ -181,7 +181,7 @@ static void pmac_dma_write(BlockBackend *blk,
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blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align);
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blk_pread(s->blk, (sector_num << 9), &io->tail_remainder, align);
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if (!unaligned_head) {
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if (!unaligned_head) {
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qemu_iovec_add(&io->iov, mem, io->len);
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qemu_iovec_add(&io->iov, io->dma_mem, io->len);
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}
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}
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qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes,
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qemu_iovec_add(&io->iov, &io->tail_remainder + tail_bytes,
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@ -193,7 +193,7 @@ static void pmac_dma_write(BlockBackend *blk,
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}
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}
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if (!unaligned_head && !unaligned_tail) {
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if (!unaligned_head && !unaligned_tail) {
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qemu_iovec_add(&io->iov, mem, io->len);
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qemu_iovec_add(&io->iov, io->dma_mem, io->len);
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}
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}
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s->io_buffer_size -= io->len;
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s->io_buffer_size -= io->len;
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@ -214,18 +214,18 @@ static void pmac_dma_trim(BlockBackend *blk,
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DBDMA_io *io = opaque;
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DBDMA_io *io = opaque;
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MACIOIDEState *m = io->opaque;
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MACIOIDEState *m = io->opaque;
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IDEState *s = idebus_active_if(&m->bus);
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IDEState *s = idebus_active_if(&m->bus);
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dma_addr_t dma_addr, dma_len;
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dma_addr_t dma_addr;
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void *mem;
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qemu_iovec_destroy(&io->iov);
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qemu_iovec_destroy(&io->iov);
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qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);
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qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);
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dma_addr = io->addr;
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dma_addr = io->addr;
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dma_len = io->len;
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io->dir = DMA_DIRECTION_TO_DEVICE;
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mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,
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io->dma_len = io->len;
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DMA_DIRECTION_TO_DEVICE);
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io->dma_mem = dma_memory_map(&address_space_memory, dma_addr, &io->dma_len,
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io->dir);
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qemu_iovec_add(&io->iov, mem, io->len);
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qemu_iovec_add(&io->iov, io->dma_mem, io->len);
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s->io_buffer_size -= io->len;
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s->io_buffer_size -= io->len;
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s->io_buffer_index += io->len;
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s->io_buffer_index += io->len;
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io->len = 0;
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io->len = 0;
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@ -285,6 +285,9 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
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return;
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return;
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done:
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done:
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dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len,
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io->dir, io->dma_len);
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if (ret < 0) {
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if (ret < 0) {
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block_acct_failed(blk_get_stats(s->blk), &s->acct);
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block_acct_failed(blk_get_stats(s->blk), &s->acct);
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} else {
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} else {
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@ -351,6 +354,9 @@ static void pmac_ide_transfer_cb(void *opaque, int ret)
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return;
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return;
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done:
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done:
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dma_memory_unmap(&address_space_memory, io->dma_mem, io->dma_len,
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io->dir, io->dma_len);
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if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
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if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
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if (ret < 0) {
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if (ret < 0) {
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block_acct_failed(blk_get_stats(s->blk), &s->acct);
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block_acct_failed(blk_get_stats(s->blk), &s->acct);
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@ -24,6 +24,7 @@
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#include "exec/memory.h"
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#include "exec/memory.h"
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#include "qemu/iov.h"
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#include "qemu/iov.h"
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#include "sysemu/dma.h"
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typedef struct DBDMA_io DBDMA_io;
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typedef struct DBDMA_io DBDMA_io;
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@ -44,6 +45,10 @@ struct DBDMA_io {
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uint8_t head_remainder[0x200];
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uint8_t head_remainder[0x200];
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uint8_t tail_remainder[0x200];
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uint8_t tail_remainder[0x200];
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QEMUIOVector iov;
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QEMUIOVector iov;
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/* DMA request */
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void *dma_mem;
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dma_addr_t dma_len;
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DMADirection dir;
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};
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};
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/*
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/*
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