target/loongarch: Add LoongArch32 cpu la132
Add LoongArch32 cpu la132. Due to lack of public documentation of la132, it is currently a synthetic LoongArch32 cpu model. Details need to be added in the future. Signed-off-by: Jiajie Chen <c@jia.je> Signed-off-by: Song Gao <gaosong@loongson.cn> Acked-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230822032724.1353391-10-gaosong@loongson.cn> Message-Id: <20230822071959.35620-4-philmd@linaro.org>
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@ -440,6 +440,35 @@ static void loongarch_la464_initfn(Object *obj)
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env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
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}
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static void loongarch_la132_initfn(Object *obj)
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{
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LoongArchCPU *cpu = LOONGARCH_CPU(obj);
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CPULoongArchState *env = &cpu->env;
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int i;
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for (i = 0; i < 21; i++) {
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env->cpucfg[i] = 0x0;
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}
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cpu->dtb_compatible = "loongarch,Loongson-1C103";
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env->cpucfg[0] = 0x148042; /* PRID */
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uint32_t data = 0;
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data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */
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data = FIELD_DP32(data, CPUCFG1, PGMMU, 1);
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data = FIELD_DP32(data, CPUCFG1, IOCSR, 1);
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data = FIELD_DP32(data, CPUCFG1, PALEN, 0x1f); /* 32 bits */
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data = FIELD_DP32(data, CPUCFG1, VALEN, 0x1f); /* 32 bits */
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data = FIELD_DP32(data, CPUCFG1, UAL, 1);
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data = FIELD_DP32(data, CPUCFG1, RI, 0);
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data = FIELD_DP32(data, CPUCFG1, EP, 0);
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data = FIELD_DP32(data, CPUCFG1, RPLV, 0);
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data = FIELD_DP32(data, CPUCFG1, HP, 1);
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data = FIELD_DP32(data, CPUCFG1, IOCSR_BRD, 1);
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env->cpucfg[1] = data;
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}
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static void loongarch_cpu_list_entry(gpointer data, gpointer user_data)
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{
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const char *typename = object_class_get_name(OBJECT_CLASS(data));
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@ -787,6 +816,7 @@ static const TypeInfo loongarch_cpu_type_infos[] = {
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.class_init = loongarch64_cpu_class_init,
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},
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DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn),
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DEFINE_LOONGARCH_CPU_TYPE(32, "la132", loongarch_la132_initfn),
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};
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DEFINE_TYPES(loongarch_cpu_type_infos)
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