target/arm: Widen cnthctl_el2 to uint64_t
This is a 64-bit register on AArch64, even if the high 44 bits are RES0. Because this is defined as ARM_CP_STATE_BOTH, we are asserting that the cpreg field is 64-bits. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230115171633.3171890-1-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -479,7 +479,7 @@ typedef struct CPUArchState {
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};
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uint64_t c14_cntfrq; /* Counter Frequency register */
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uint64_t c14_cntkctl; /* Timer Control register */
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uint32_t cnthctl_el2; /* Counter/Timer Hyp Control register */
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uint64_t cnthctl_el2; /* Counter/Timer Hyp Control register */
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uint64_t cntvoff_el2; /* Counter Virtual Offset register */
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ARMGenericTimer c14_timer[NUM_GTIMERS];
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uint32_t c15_cpar; /* XScale Coprocessor Access Register */
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