tcg: Manually expand INDEX_op_dup_vec
This case is similar to INDEX_op_mov_* in that we need to do different things depending on the current location of the source. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v3: Added some commentary to the tcg_reg_alloc_* functions.
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@ -2108,10 +2108,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
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case INDEX_op_mov_i64:
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case INDEX_op_mov_vec:
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case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
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case INDEX_op_movi_i64:
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case INDEX_op_dupi_vec:
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case INDEX_op_call: /* Always emitted via tcg_out_call. */
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default:
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g_assert_not_reached();
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@ -2208,9 +2206,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_not_vec:
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tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a1);
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break;
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case INDEX_op_dup_vec:
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tcg_out_dup_vec(s, type, vece, a0, a1);
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break;
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case INDEX_op_shli_vec:
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tcg_out_insn(s, 3614, SHL, is_q, a0, a1, a2 + (8 << vece));
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break;
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@ -2254,6 +2249,10 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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}
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}
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break;
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case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
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case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
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case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
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default:
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g_assert_not_reached();
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}
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@ -2603,10 +2603,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
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case INDEX_op_mov_i64:
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case INDEX_op_mov_vec:
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case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
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case INDEX_op_movi_i64:
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case INDEX_op_dupi_vec:
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case INDEX_op_call: /* Always emitted via tcg_out_call. */
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default:
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tcg_abort();
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@ -2795,9 +2793,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_st_vec:
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tcg_out_st(s, type, a0, a1, a2);
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break;
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case INDEX_op_dup_vec:
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tcg_out_dup_vec(s, type, vece, a0, a1);
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break;
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case INDEX_op_x86_shufps_vec:
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insn = OPC_SHUFPS;
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@ -2839,6 +2834,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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tcg_out8(s, a2);
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break;
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case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
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case INDEX_op_dupi_vec: /* Always emitted via tcg_out_movi. */
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case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
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default:
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g_assert_not_reached();
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}
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111
tcg/tcg.c
111
tcg/tcg.c
@ -3284,6 +3284,9 @@ static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
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save_globals(s, allocated_regs);
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}
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/*
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* Specialized code generation for INDEX_op_movi_*.
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*/
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static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
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tcg_target_ulong val, TCGLifeData arg_life,
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TCGRegSet preferred_regs)
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@ -3313,6 +3316,9 @@ static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op)
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tcg_reg_alloc_do_movi(s, ots, val, op->life, op->output_pref[0]);
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}
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/*
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* Specialized code generation for INDEX_op_mov_*.
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*/
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static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
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{
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const TCGLifeData arg_life = op->life;
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@ -3407,6 +3413,108 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
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}
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}
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/*
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* Specialized code generation for INDEX_op_dup_vec.
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*/
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static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
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{
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const TCGLifeData arg_life = op->life;
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TCGRegSet dup_out_regs, dup_in_regs;
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TCGTemp *its, *ots;
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TCGType itype, vtype;
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unsigned vece;
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bool ok;
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ots = arg_temp(op->args[0]);
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its = arg_temp(op->args[1]);
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/* ENV should not be modified. */
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tcg_debug_assert(!ots->fixed_reg);
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itype = its->type;
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vece = TCGOP_VECE(op);
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vtype = TCGOP_VECL(op) + TCG_TYPE_V64;
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if (its->val_type == TEMP_VAL_CONST) {
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/* Propagate constant via movi -> dupi. */
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tcg_target_ulong val = its->val;
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if (IS_DEAD_ARG(1)) {
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temp_dead(s, its);
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}
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tcg_reg_alloc_do_movi(s, ots, val, arg_life, op->output_pref[0]);
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return;
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}
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dup_out_regs = tcg_op_defs[INDEX_op_dup_vec].args_ct[0].u.regs;
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dup_in_regs = tcg_op_defs[INDEX_op_dup_vec].args_ct[1].u.regs;
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/* Allocate the output register now. */
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if (ots->val_type != TEMP_VAL_REG) {
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TCGRegSet allocated_regs = s->reserved_regs;
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if (!IS_DEAD_ARG(1) && its->val_type == TEMP_VAL_REG) {
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/* Make sure to not spill the input register. */
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tcg_regset_set_reg(allocated_regs, its->reg);
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}
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ots->reg = tcg_reg_alloc(s, dup_out_regs, allocated_regs,
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op->output_pref[0], ots->indirect_base);
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ots->val_type = TEMP_VAL_REG;
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ots->mem_coherent = 0;
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s->reg_to_temp[ots->reg] = ots;
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}
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switch (its->val_type) {
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case TEMP_VAL_REG:
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/*
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* The dup constriaints must be broad, covering all possible VECE.
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* However, tcg_op_dup_vec() gets to see the VECE and we allow it
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* to fail, indicating that extra moves are required for that case.
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*/
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if (tcg_regset_test_reg(dup_in_regs, its->reg)) {
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if (tcg_out_dup_vec(s, vtype, vece, ots->reg, its->reg)) {
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goto done;
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}
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/* Try again from memory or a vector input register. */
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}
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if (!its->mem_coherent) {
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/*
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* The input register is not synced, and so an extra store
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* would be required to use memory. Attempt an integer-vector
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* register move first. We do not have a TCGRegSet for this.
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*/
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if (tcg_out_mov(s, itype, ots->reg, its->reg)) {
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break;
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}
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/* Sync the temp back to its slot and load from there. */
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temp_sync(s, its, s->reserved_regs, 0, 0);
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}
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/* fall through */
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case TEMP_VAL_MEM:
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/* TODO: dup from memory */
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tcg_out_ld(s, itype, ots->reg, its->mem_base->reg, its->mem_offset);
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break;
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default:
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g_assert_not_reached();
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}
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/* We now have a vector input register, so dup must succeed. */
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ok = tcg_out_dup_vec(s, vtype, vece, ots->reg, ots->reg);
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tcg_debug_assert(ok);
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done:
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if (IS_DEAD_ARG(1)) {
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temp_dead(s, its);
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}
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if (NEED_SYNC_ARG(0)) {
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temp_sync(s, ots, s->reserved_regs, 0, 0);
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}
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if (IS_DEAD_ARG(0)) {
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temp_dead(s, ots);
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}
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}
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static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
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{
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const TCGLifeData arg_life = op->life;
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@ -3981,6 +4089,9 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
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case INDEX_op_dupi_vec:
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tcg_reg_alloc_movi(s, op);
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break;
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case INDEX_op_dup_vec:
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tcg_reg_alloc_dup(s, op);
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break;
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case INDEX_op_insn_start:
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if (num_insns >= 0) {
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size_t off = tcg_current_code_size(s);
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