tcg/tci: Reserve r13 for a temporary
We're about to adjust the offset range on host memory ops, and the format of branches. Both will require a temporary. Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
7b7d8b2d9a
commit
baa94c0d33
@ -820,6 +820,7 @@ static void tcg_target_init(TCGContext *s)
|
|||||||
MAKE_64BIT_MASK(TCG_REG_R0, 64 / TCG_TARGET_REG_BITS);
|
MAKE_64BIT_MASK(TCG_REG_R0, 64 / TCG_TARGET_REG_BITS);
|
||||||
|
|
||||||
s->reserved_regs = 0;
|
s->reserved_regs = 0;
|
||||||
|
tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP);
|
||||||
tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
|
tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
|
||||||
|
|
||||||
/* The call arguments come first, followed by the temp storage. */
|
/* The call arguments come first, followed by the temp storage. */
|
||||||
|
@ -156,6 +156,7 @@ typedef enum {
|
|||||||
TCG_REG_R14,
|
TCG_REG_R14,
|
||||||
TCG_REG_R15,
|
TCG_REG_R15,
|
||||||
|
|
||||||
|
TCG_REG_TMP = TCG_REG_R13,
|
||||||
TCG_AREG0 = TCG_REG_R14,
|
TCG_AREG0 = TCG_REG_R14,
|
||||||
TCG_REG_CALL_STACK = TCG_REG_R15,
|
TCG_REG_CALL_STACK = TCG_REG_R15,
|
||||||
} TCGReg;
|
} TCGReg;
|
||||||
|
Loading…
Reference in New Issue
Block a user