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sun4m: move sun4m_iommu.c from hw/dma to hw/sparc

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This seems more appropriate and brings sun4m in line with the other
architectures.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
This commit is contained in:
Mark Cave-Ayland 2018-01-08 18:16:34 +00:00
parent 69520948e1
commit ba51ef2557
5 changed files with 17 additions and 17 deletions
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1
hw/dma/Makefile.objs
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@ -8,7 +8,6 @@ common-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
common-obj-$(CONFIG_ZYNQ_DEVCFG) += xlnx-zynq-devcfg.o common-obj-$(CONFIG_ZYNQ_DEVCFG) += xlnx-zynq-devcfg.o
common-obj-$(CONFIG_ETRAXFS) += etraxfs_dma.o common-obj-$(CONFIG_ETRAXFS) += etraxfs_dma.o
common-obj-$(CONFIG_STP2000) += sparc32_dma.o common-obj-$(CONFIG_STP2000) += sparc32_dma.o
common-obj-$(CONFIG_SUN4M) += sun4m_iommu.o
obj-$(CONFIG_XLNX_ZYNQMP) += xlnx_dpdma.o obj-$(CONFIG_XLNX_ZYNQMP) += xlnx_dpdma.o
obj-$(CONFIG_OMAP) += omap_dma.o soc_dma.o obj-$(CONFIG_OMAP) += omap_dma.o soc_dma.o

10
hw/dma/trace-events
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@ -18,15 +18,5 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg
sparc32_dma_enable_raise(void) "Raise DMA enable" sparc32_dma_enable_raise(void) "Raise DMA enable"
sparc32_dma_enable_lower(void) "Lower DMA enable" sparc32_dma_enable_lower(void) "Lower DMA enable"
# hw/dma/sun4m_iommu.c
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64
sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"
sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"
sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64
# hw/dma/i8257.c # hw/dma/i8257.c
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d"

2
hw/sparc/Makefile.objs
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@ -1 +1 @@
obj-y += sun4m.o leon3.o obj-y += sun4m_iommu.o sun4m.o leon3.o

11
hw/dma/sun4m_iommu.c → hw/sparc/sun4m_iommu.c
View File

@ -125,7 +125,7 @@
#define IOMMU_PAGE_SHIFT 12 #define IOMMU_PAGE_SHIFT 12
#define IOMMU_PAGE_SIZE (1 << IOMMU_PAGE_SHIFT) #define IOMMU_PAGE_SIZE (1 << IOMMU_PAGE_SHIFT)
#define IOMMU_PAGE_MASK ~(IOMMU_PAGE_SIZE - 1) #define IOMMU_PAGE_MASK (~(IOMMU_PAGE_SIZE - 1))
static uint64_t iommu_mem_read(void *opaque, hwaddr addr, static uint64_t iommu_mem_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
@ -218,8 +218,8 @@ static void iommu_mem_write(void *opaque, hwaddr addr,
s->regs[saddr] = val & IOMMU_SBCFG_MASK; s->regs[saddr] = val & IOMMU_SBCFG_MASK;
break; break;
case IOMMU_ARBEN: case IOMMU_ARBEN:
// XXX implement SBus probing: fault when reading unmapped /* XXX implement SBus probing: fault when reading unmapped
// addresses, fault cause and address stored to MMU/IOMMU addresses, fault cause and address stored to MMU/IOMMU */
s->regs[saddr] = (val & IOMMU_ARBEN_MASK) | IOMMU_MID; s->regs[saddr] = (val & IOMMU_ARBEN_MASK) | IOMMU_MID;
break; break;
case IOMMU_MASK_ID: case IOMMU_MASK_ID:
@ -272,8 +272,9 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr,
trace_sun4m_iommu_bad_addr(addr); trace_sun4m_iommu_bad_addr(addr);
s->regs[IOMMU_AFSR] = IOMMU_AFSR_ERR | IOMMU_AFSR_LE | IOMMU_AFSR_RESV | s->regs[IOMMU_AFSR] = IOMMU_AFSR_ERR | IOMMU_AFSR_LE | IOMMU_AFSR_RESV |
IOMMU_AFSR_FAV; IOMMU_AFSR_FAV;
if (!is_write) if (!is_write) {
s->regs[IOMMU_AFSR] |= IOMMU_AFSR_RD; s->regs[IOMMU_AFSR] |= IOMMU_AFSR_RD;
}
s->regs[IOMMU_AFAR] = addr; s->regs[IOMMU_AFAR] = addr;
qemu_irq_raise(s->irq); qemu_irq_raise(s->irq);
} }
@ -322,7 +323,7 @@ static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu,
} }
static const VMStateDescription vmstate_iommu = { static const VMStateDescription vmstate_iommu = {
.name ="iommu", .name = "iommu",
.version_id = 2, .version_id = 2,
.minimum_version_id = 2, .minimum_version_id = 2,
.fields = (VMStateField[]) { .fields = (VMStateField[]) {

10
hw/sparc/trace-events
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@ -6,6 +6,16 @@ sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
# hw/sparc/sun4m_iommu.c
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64
sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"
sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"
sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64
# hw/sparc/leon3.c # hw/sparc/leon3.c
leon3_set_irq(int intno) "Set CPU IRQ %d" leon3_set_irq(int intno) "Set CPU IRQ %d"
leon3_reset_irq(int intno) "Reset CPU IRQ %d" leon3_reset_irq(int intno) "Reset CPU IRQ %d"