hw/misc/mips_itu: Remove MIPSITUState::cpu0 field
Since previous commit the MIPSITUState::cpu0 field is not used anymore. Remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240209090513.9401-6-philmd@linaro.org>
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@ -103,8 +103,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
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/* Inter-Thread Communication Unit */
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if (itu_present) {
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object_initialize_child(OBJECT(dev), "itu", &s->itu, TYPE_MIPS_ITU);
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object_property_set_link(OBJECT(&s->itu), "cpu[0]",
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OBJECT(first_cpu), &error_abort);
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object_property_set_uint(OBJECT(&s->itu), "num-fifo", 16,
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&error_abort);
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object_property_set_uint(OBJECT(&s->itu), "num-semaphores", 16,
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@ -527,10 +527,6 @@ static void mips_itu_realize(DeviceState *dev, Error **errp)
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s->num_semaphores);
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return;
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}
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if (!s->cpu0) {
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error_setg(errp, "Missing 'cpu[0]' property");
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return;
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}
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s->cell = g_new(ITCStorageCell, get_num_cells(s));
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}
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@ -558,7 +554,6 @@ static Property mips_itu_properties[] = {
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ITC_FIFO_NUM_MAX),
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DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores,
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ITC_SEMAPH_NUM_MAX),
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DEFINE_PROP_LINK("cpu[0]", MIPSITUState, cpu0, TYPE_MIPS_CPU, ArchCPU *),
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DEFINE_PROP_END_OF_LIST(),
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};
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@ -73,7 +73,6 @@ struct MIPSITUState {
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/* SAAR */
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uint64_t *saar;
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ArchCPU *cpu0;
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};
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/* Get ITC Configuration Tag memory region. */
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