kvm: make tsc stable over migration and machine start

If the machine is stopped, we should not record two different tsc values
upon a save operation. The same problem happens with kvmclock.

But kvmclock is taking a different diretion, being now seen as a separate
device. Since this is unlikely to happen with the tsc, I am taking the
approach here of simply registering a handler for state change, and
using a per-CPUState variable that prevents double updates for the TSC.

Signed-off-by: Glauber Costa <glommer@redhat.com>
CC: Jan Kiszka <jan.kiszka@web.de>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
This commit is contained in:
Glauber Costa 2011-02-03 14:19:53 -05:00 committed by Marcelo Tosatti
parent cdea50ede1
commit b8cc45d6a6
2 changed files with 18 additions and 1 deletions

View File

@ -734,6 +734,7 @@ typedef struct CPUX86State {
uint32_t sipi_vector; uint32_t sipi_vector;
uint32_t cpuid_kvm_features; uint32_t cpuid_kvm_features;
uint32_t cpuid_svm_features; uint32_t cpuid_svm_features;
bool tsc_valid;
/* in order to simplify APIC support, we leave this pointer to the /* in order to simplify APIC support, we leave this pointer to the
user */ user */

View File

@ -301,6 +301,15 @@ void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
#endif #endif
} }
static void cpu_update_state(void *opaque, int running, int reason)
{
CPUState *env = opaque;
if (running) {
env->tsc_valid = false;
}
}
int kvm_arch_init_vcpu(CPUState *env) int kvm_arch_init_vcpu(CPUState *env)
{ {
struct { struct {
@ -434,6 +443,8 @@ int kvm_arch_init_vcpu(CPUState *env)
} }
#endif #endif
qemu_add_vm_change_state_handler(cpu_update_state, env);
return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data); return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data);
} }
@ -1061,7 +1072,12 @@ static int kvm_get_msrs(CPUState *env)
if (has_msr_hsave_pa) { if (has_msr_hsave_pa) {
msrs[n++].index = MSR_VM_HSAVE_PA; msrs[n++].index = MSR_VM_HSAVE_PA;
} }
msrs[n++].index = MSR_IA32_TSC;
if (!env->tsc_valid) {
msrs[n++].index = MSR_IA32_TSC;
env->tsc_valid = !vm_running;
}
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
if (lm_capable_kernel) { if (lm_capable_kernel) {
msrs[n++].index = MSR_CSTAR; msrs[n++].index = MSR_CSTAR;