kvm: make tsc stable over migration and machine start
If the machine is stopped, we should not record two different tsc values upon a save operation. The same problem happens with kvmclock. But kvmclock is taking a different diretion, being now seen as a separate device. Since this is unlikely to happen with the tsc, I am taking the approach here of simply registering a handler for state change, and using a per-CPUState variable that prevents double updates for the TSC. Signed-off-by: Glauber Costa <glommer@redhat.com> CC: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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@ -734,6 +734,7 @@ typedef struct CPUX86State {
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uint32_t sipi_vector;
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uint32_t cpuid_kvm_features;
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uint32_t cpuid_svm_features;
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bool tsc_valid;
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/* in order to simplify APIC support, we leave this pointer to the
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user */
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@ -301,6 +301,15 @@ void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
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#endif
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}
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static void cpu_update_state(void *opaque, int running, int reason)
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{
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CPUState *env = opaque;
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if (running) {
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env->tsc_valid = false;
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}
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}
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int kvm_arch_init_vcpu(CPUState *env)
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{
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struct {
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@ -434,6 +443,8 @@ int kvm_arch_init_vcpu(CPUState *env)
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}
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#endif
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qemu_add_vm_change_state_handler(cpu_update_state, env);
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return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data);
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}
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@ -1061,7 +1072,12 @@ static int kvm_get_msrs(CPUState *env)
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if (has_msr_hsave_pa) {
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msrs[n++].index = MSR_VM_HSAVE_PA;
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}
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msrs[n++].index = MSR_IA32_TSC;
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if (!env->tsc_valid) {
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msrs[n++].index = MSR_IA32_TSC;
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env->tsc_valid = !vm_running;
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}
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#ifdef TARGET_X86_64
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if (lm_capable_kernel) {
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msrs[n++].index = MSR_CSTAR;
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