hw/char/pl011: Avoid division-by-zero in pl011_get_baudrate()
In pl011_get_baudrate(), when we calculate the baudrate we can accidentally divide by zero. This happens because although (as the specification requires) we treat UARTIBRD = 0 as invalid, we aren't correctly limiting UARTIBRD and UARTFBRD values to the 16-bit and 6-bit ranges the hardware allows, and so some non-zero values of UARTIBRD can result in a zero divisor. Enforce the correct register field widths on guest writes and on inbound migration to avoid the division by zero. ASAN log: ==2973125==ERROR: AddressSanitizer: FPE on unknown address 0x55f72629b348 (pc 0x55f72629b348 bp 0x7fffa24d0e00 sp 0x7fffa24d0d60 T0) #0 0x55f72629b348 in pl011_get_baudrate hw/char/pl011.c:255:17 #1 0x55f726298d94 in pl011_trace_baudrate_change hw/char/pl011.c:260:33 #2 0x55f726296fc8 in pl011_write hw/char/pl011.c:378:9 Reproducer: cat << EOF | qemu-system-aarch64 -display \ none -machine accel=qtest, -m 512M -machine realview-pb-a8 -qtest stdio writeq 0x1000b024 0xf8000000 EOF Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Zheyu Ma <zheyuma97@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240702155752.3022007-1-zheyuma97@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -87,6 +87,12 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
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#define CR_DTR (1 << 10)
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#define CR_LBE (1 << 7)
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/* Integer Baud Rate Divider, UARTIBRD */
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#define IBRD_MASK 0x3f
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/* Fractional Baud Rate Divider, UARTFBRD */
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#define FBRD_MASK 0xffff
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static const unsigned char pl011_id_arm[8] =
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{ 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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static const unsigned char pl011_id_luminary[8] =
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@ -374,11 +380,11 @@ static void pl011_write(void *opaque, hwaddr offset,
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s->ilpr = value;
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break;
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case 9: /* UARTIBRD */
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s->ibrd = value;
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s->ibrd = value & IBRD_MASK;
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pl011_trace_baudrate_change(s);
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break;
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case 10: /* UARTFBRD */
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s->fbrd = value;
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s->fbrd = value & FBRD_MASK;
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pl011_trace_baudrate_change(s);
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break;
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case 11: /* UARTLCR_H */
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@ -531,6 +537,9 @@ static int pl011_post_load(void *opaque, int version_id)
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s->read_pos = 0;
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}
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s->ibrd &= IBRD_MASK;
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s->fbrd &= FBRD_MASK;
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return 0;
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}
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