target/ppc/mmu-radix64: Remove externally unused parts from header
Move the parts not needed outside of mmu-radix64.c from the header to the C file to leave only parts in the header that need to be exported. Also drop unneded include of this header. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Acked-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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@ -21,7 +21,6 @@
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#include "cpu.h"
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#include "cpu.h"
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#include "mmu-hash64.h"
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#include "mmu-hash64.h"
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#include "mmu-book3s-v3.h"
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#include "mmu-book3s-v3.h"
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#include "mmu-radix64.h"
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bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
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bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t *entry)
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{
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{
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@ -29,6 +29,37 @@
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#include "mmu-radix64.h"
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#include "mmu-radix64.h"
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#include "mmu-book3s-v3.h"
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#include "mmu-book3s-v3.h"
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/* Radix Partition Table Entry Fields */
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#define PATE1_R_PRTB 0x0FFFFFFFFFFFF000
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#define PATE1_R_PRTS 0x000000000000001F
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/* Radix Process Table Entry Fields */
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#define PRTBE_R_GET_RTS(rts) \
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((((rts >> 58) & 0x18) | ((rts >> 5) & 0x7)) + 31)
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#define PRTBE_R_RPDB 0x0FFFFFFFFFFFFF00
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#define PRTBE_R_RPDS 0x000000000000001F
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/* Radix Page Directory/Table Entry Fields */
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#define R_PTE_VALID 0x8000000000000000
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#define R_PTE_LEAF 0x4000000000000000
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#define R_PTE_SW0 0x2000000000000000
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#define R_PTE_RPN 0x01FFFFFFFFFFF000
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#define R_PTE_SW1 0x0000000000000E00
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#define R_GET_SW(sw) (((sw >> 58) & 0x8) | ((sw >> 9) & 0x7))
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#define R_PTE_R 0x0000000000000100
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#define R_PTE_C 0x0000000000000080
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#define R_PTE_ATT 0x0000000000000030
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#define R_PTE_ATT_NORMAL 0x0000000000000000
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#define R_PTE_ATT_SAO 0x0000000000000010
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#define R_PTE_ATT_NI_IO 0x0000000000000020
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#define R_PTE_ATT_TOLERANT_IO 0x0000000000000030
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#define R_PTE_EAA_PRIV 0x0000000000000008
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#define R_PTE_EAA_R 0x0000000000000004
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#define R_PTE_EAA_RW 0x0000000000000002
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#define R_PTE_EAA_X 0x0000000000000001
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#define R_PDE_NLB PRTBE_R_RPDB
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#define R_PDE_NLS PRTBE_R_RPDS
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static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env,
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static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env,
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vaddr eaddr,
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vaddr eaddr,
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uint64_t *lpid, uint64_t *pid)
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uint64_t *lpid, uint64_t *pid)
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@ -180,6 +211,24 @@ static void ppc_radix64_raise_hsi(PowerPCCPU *cpu, MMUAccessType access_type,
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}
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}
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}
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}
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static int ppc_radix64_get_prot_eaa(uint64_t pte)
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{
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return (pte & R_PTE_EAA_R ? PAGE_READ : 0) |
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(pte & R_PTE_EAA_RW ? PAGE_READ | PAGE_WRITE : 0) |
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(pte & R_PTE_EAA_X ? PAGE_EXEC : 0);
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}
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static int ppc_radix64_get_prot_amr(const PowerPCCPU *cpu)
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{
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const CPUPPCState *env = &cpu->env;
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int amr = env->spr[SPR_AMR] >> 62; /* We only care about key0 AMR63:62 */
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int iamr = env->spr[SPR_IAMR] >> 62; /* We only care about key0 IAMR63:62 */
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return (amr & 0x2 ? 0 : PAGE_WRITE) | /* Access denied if bit is set */
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(amr & 0x1 ? 0 : PAGE_READ) |
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(iamr & 0x1 ? 0 : PAGE_EXEC);
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}
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static bool ppc_radix64_check_prot(PowerPCCPU *cpu, MMUAccessType access_type,
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static bool ppc_radix64_check_prot(PowerPCCPU *cpu, MMUAccessType access_type,
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uint64_t pte, int *fault_cause, int *prot,
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uint64_t pte, int *fault_cause, int *prot,
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int mmu_idx, bool partition_scoped)
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int mmu_idx, bool partition_scoped)
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@ -3,7 +3,7 @@
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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#include "exec/page-protection.h"
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#ifdef TARGET_PPC64
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/* Radix Quadrants */
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/* Radix Quadrants */
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#define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF
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#define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF
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@ -14,61 +14,10 @@
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#define R_EADDR_QUADRANT2 0x8000000000000000
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#define R_EADDR_QUADRANT2 0x8000000000000000
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#define R_EADDR_QUADRANT3 0xC000000000000000
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#define R_EADDR_QUADRANT3 0xC000000000000000
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/* Radix Partition Table Entry Fields */
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#define PATE1_R_PRTB 0x0FFFFFFFFFFFF000
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#define PATE1_R_PRTS 0x000000000000001F
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/* Radix Process Table Entry Fields */
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#define PRTBE_R_GET_RTS(rts) \
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((((rts >> 58) & 0x18) | ((rts >> 5) & 0x7)) + 31)
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#define PRTBE_R_RPDB 0x0FFFFFFFFFFFFF00
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#define PRTBE_R_RPDS 0x000000000000001F
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/* Radix Page Directory/Table Entry Fields */
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#define R_PTE_VALID 0x8000000000000000
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#define R_PTE_LEAF 0x4000000000000000
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#define R_PTE_SW0 0x2000000000000000
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#define R_PTE_RPN 0x01FFFFFFFFFFF000
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#define R_PTE_SW1 0x0000000000000E00
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#define R_GET_SW(sw) (((sw >> 58) & 0x8) | ((sw >> 9) & 0x7))
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#define R_PTE_R 0x0000000000000100
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#define R_PTE_C 0x0000000000000080
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#define R_PTE_ATT 0x0000000000000030
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#define R_PTE_ATT_NORMAL 0x0000000000000000
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#define R_PTE_ATT_SAO 0x0000000000000010
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#define R_PTE_ATT_NI_IO 0x0000000000000020
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#define R_PTE_ATT_TOLERANT_IO 0x0000000000000030
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#define R_PTE_EAA_PRIV 0x0000000000000008
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#define R_PTE_EAA_R 0x0000000000000004
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#define R_PTE_EAA_RW 0x0000000000000002
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#define R_PTE_EAA_X 0x0000000000000001
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#define R_PDE_NLB PRTBE_R_RPDB
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#define R_PDE_NLS PRTBE_R_RPDS
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#ifdef TARGET_PPC64
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bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
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bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
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hwaddr *raddr, int *psizep, int *protp, int mmu_idx,
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hwaddr *raddr, int *psizep, int *protp, int mmu_idx,
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bool guest_visible);
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bool guest_visible);
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static inline int ppc_radix64_get_prot_eaa(uint64_t pte)
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{
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return (pte & R_PTE_EAA_R ? PAGE_READ : 0) |
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(pte & R_PTE_EAA_RW ? PAGE_READ | PAGE_WRITE : 0) |
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(pte & R_PTE_EAA_X ? PAGE_EXEC : 0);
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}
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static inline int ppc_radix64_get_prot_amr(const PowerPCCPU *cpu)
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{
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const CPUPPCState *env = &cpu->env;
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int amr = env->spr[SPR_AMR] >> 62; /* We only care about key0 AMR63:62 */
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int iamr = env->spr[SPR_IAMR] >> 62; /* We only care about key0 IAMR63:62 */
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return (amr & 0x2 ? 0 : PAGE_WRITE) | /* Access denied if bit is set */
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(amr & 0x1 ? 0 : PAGE_READ) |
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(iamr & 0x1 ? 0 : PAGE_EXEC);
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}
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#endif /* TARGET_PPC64 */
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#endif /* TARGET_PPC64 */
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#endif /* CONFIG_USER_ONLY */
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#endif /* CONFIG_USER_ONLY */
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