target-ppc: Implement bcdcfn. instruction
bcdcfn. converts from National numeric format to BCD. National format uses a byte to represent a digit where the most significant nibble is always 0x3 and the least sign. nibbles is the digit itself. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -378,6 +378,7 @@ DEF_HELPER_4(vpermxor, void, avr, avr, avr, avr)
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DEF_HELPER_4(bcdadd, i32, avr, avr, avr, i32)
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DEF_HELPER_4(bcdsub, i32, avr, avr, avr, i32)
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DEF_HELPER_3(bcdcfn, i32, avr, avr, i32)
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DEF_HELPER_2(xsadddp, void, env, i32)
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DEF_HELPER_2(xssubdp, void, env, i32)
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@ -2492,6 +2492,8 @@ void helper_vsubecuq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c)
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#define BCD_NEG_PREF 0xD
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#define BCD_NEG_ALT 0xB
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#define BCD_PLUS_ALT_2 0xE
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#define NATIONAL_PLUS 0x2B
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#define NATIONAL_NEG 0x2D
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#if defined(HOST_WORDS_BIGENDIAN)
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#define BCD_DIG_BYTE(n) (15 - (n/2))
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@ -2558,6 +2560,24 @@ static void bcd_put_digit(ppc_avr_t *bcd, uint8_t digit, int n)
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}
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}
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static int bcd_cmp_zero(ppc_avr_t *bcd)
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{
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if (bcd->u64[HI_IDX] == 0 && (bcd->u64[LO_IDX] >> 4) == 0) {
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return 1 << CRF_EQ;
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} else {
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return (bcd_get_sgn(bcd) == 1) ? 1 << CRF_GT : 1 << CRF_LT;
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}
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}
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static uint16_t get_national_digit(ppc_avr_t *reg, int n)
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{
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#if defined(HOST_WORDS_BIGENDIAN)
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return reg->u16[8 - n];
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#else
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return reg->u16[n];
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#endif
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}
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static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b)
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{
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int i;
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@ -2688,6 +2708,42 @@ uint32_t helper_bcdsub(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
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return helper_bcdadd(r, a, &bcopy, ps);
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}
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uint32_t helper_bcdcfn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
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{
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int i;
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int cr = 0;
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uint16_t national = 0;
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uint16_t sgnb = get_national_digit(b, 0);
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ppc_avr_t ret = { .u64 = { 0, 0 } };
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int invalid = (sgnb != NATIONAL_PLUS && sgnb != NATIONAL_NEG);
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for (i = 1; i < 8; i++) {
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national = get_national_digit(b, i);
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if (unlikely(national < 0x30 || national > 0x39)) {
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invalid = 1;
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break;
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}
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bcd_put_digit(&ret, national & 0xf, i);
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}
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if (sgnb == NATIONAL_PLUS) {
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bcd_put_digit(&ret, (ps == 0) ? BCD_PLUS_PREF_1 : BCD_PLUS_PREF_2, 0);
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} else {
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bcd_put_digit(&ret, BCD_NEG_PREF, 0);
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}
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cr = bcd_cmp_zero(&ret);
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if (unlikely(invalid)) {
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cr = 1 << CRF_SO;
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}
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*r = ret;
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return cr;
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}
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void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
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{
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int i;
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@ -960,8 +960,61 @@ static void gen_##op(DisasContext *ctx) \
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tcg_temp_free_i32(ps); \
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}
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#define GEN_BCD2(op) \
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static void gen_##op(DisasContext *ctx) \
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{ \
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TCGv_ptr rd, rb; \
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TCGv_i32 ps; \
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\
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if (unlikely(!ctx->altivec_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VPU); \
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return; \
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} \
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\
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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\
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ps = tcg_const_i32((ctx->opcode & 0x200) != 0); \
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\
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gen_helper_##op(cpu_crf[6], rd, rb, ps); \
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\
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tcg_temp_free_ptr(rb); \
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tcg_temp_free_ptr(rd); \
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tcg_temp_free_i32(ps); \
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}
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GEN_BCD(bcdadd)
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GEN_BCD(bcdsub)
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GEN_BCD2(bcdcfn)
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static void gen_xpnd04_1(DisasContext *ctx)
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{
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switch (opc4(ctx->opcode)) {
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case 7:
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gen_bcdcfn(ctx);
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break;
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default:
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gen_invalid(ctx);
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break;
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}
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}
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static void gen_xpnd04_2(DisasContext *ctx)
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{
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switch (opc4(ctx->opcode)) {
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case 7:
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gen_bcdcfn(ctx);
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break;
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default:
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gen_invalid(ctx);
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break;
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}
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}
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GEN_VXFORM_DUAL(vsubcuw, PPC_ALTIVEC, PPC_NONE, \
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xpnd04_1, PPC_NONE, PPC2_ISA300)
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GEN_VXFORM_DUAL(vsubsws, PPC_ALTIVEC, PPC_NONE, \
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xpnd04_2, PPC_NONE, PPC2_ISA300)
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GEN_VXFORM_DUAL(vsububm, PPC_ALTIVEC, PPC_NONE, \
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bcdadd, PPC_NONE, PPC2_ALTIVEC_207)
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@ -1038,3 +1091,5 @@ GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE,
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#undef GEN_VXFORM_NOA
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#undef GEN_VXFORM_UIMM
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#undef GEN_VAFORM_PAIRED
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#undef GEN_BCD2
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@ -126,7 +126,7 @@ GEN_HANDLER_E_2(vprtybw, 0x4, 0x1, 0x18, 8, 0, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E_2(vprtybd, 0x4, 0x1, 0x18, 9, 0, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E_2(vprtybq, 0x4, 0x1, 0x18, 10, 0, PPC_NONE, PPC2_ISA300),
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GEN_VXFORM(vsubcuw, 0, 22),
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GEN_VXFORM_DUAL(vsubcuw, xpnd04_1, 0, 22, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM_DUAL(vaddubs, vmul10uq, 0, 8, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM_DUAL(vadduhs, vmul10euq, 0, 9, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM(vadduws, 0, 10),
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@ -138,7 +138,7 @@ GEN_VXFORM_DUAL(vsubuhs, bcdsub, 0, 25, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM(vsubuws, 0, 26),
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GEN_VXFORM(vsubsbs, 0, 28),
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GEN_VXFORM(vsubshs, 0, 29),
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GEN_VXFORM(vsubsws, 0, 30),
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GEN_VXFORM_DUAL(vsubsws, xpnd04_2, 0, 30, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM_207(vadduqm, 0, 4),
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GEN_VXFORM_207(vaddcuq, 0, 5),
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GEN_VXFORM_DUAL(vaddeuqm, vaddecuq, 30, 0xFF, PPC_NONE, PPC2_ALTIVEC_207),
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