ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties
The same rationale provided in the PHB3 bus case applies here. Note: we could have merged both buses in a single object, like we did with the root ports, and spare some boilerplate. The reason we opted to preserve both buses objects is twofold: - there's not user side advantage in doing so. Unifying the root ports presents a clear user QOL change when we enable user created devices back. The buses objects, aside from having a different QOM name, is transparent to the user; - we leave a door opened in case we want to increase the root port limit for phb4/5 later on without having to deal with phb3 code. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220811163950.578927-3-danielhb413@gmail.com>
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@ -1551,6 +1551,12 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb)
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pnv_phb4_set_irq, pnv_phb4_map_irq, phb,
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&phb->pci_mmio, &phb->pci_io,
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0, 4, TYPE_PNV_PHB4_ROOT_BUS);
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object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id,
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&error_abort);
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object_property_set_int(OBJECT(pci->bus), "chip-id", phb->chip_id,
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&error_abort);
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pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb);
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pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE;
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}
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@ -1708,10 +1714,55 @@ static const TypeInfo pnv_phb5_type_info = {
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.instance_size = sizeof(PnvPHB4),
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};
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static void pnv_phb4_root_bus_get_prop(Object *obj, Visitor *v,
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const char *name,
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void *opaque, Error **errp)
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{
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PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj);
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uint64_t value = 0;
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if (strcmp(name, "phb-id") == 0) {
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value = bus->phb_id;
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} else {
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value = bus->chip_id;
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}
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visit_type_size(v, name, &value, errp);
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}
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static void pnv_phb4_root_bus_set_prop(Object *obj, Visitor *v,
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const char *name,
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void *opaque, Error **errp)
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{
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PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj);
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uint64_t value;
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if (!visit_type_size(v, name, &value, errp)) {
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return;
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}
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if (strcmp(name, "phb-id") == 0) {
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bus->phb_id = value;
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} else {
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bus->chip_id = value;
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}
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}
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static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data)
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{
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BusClass *k = BUS_CLASS(klass);
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object_class_property_add(klass, "phb-id", "int",
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pnv_phb4_root_bus_get_prop,
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pnv_phb4_root_bus_set_prop,
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NULL, NULL);
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object_class_property_add(klass, "chip-id", "int",
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pnv_phb4_root_bus_get_prop,
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pnv_phb4_root_bus_set_prop,
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NULL, NULL);
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/*
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* PHB4 has only a single root complex. Enforce the limit on the
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* parent bus
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@ -45,7 +45,17 @@ typedef struct PnvPhb4DMASpace {
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QLIST_ENTRY(PnvPhb4DMASpace) list;
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} PnvPhb4DMASpace;
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/*
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* PHB4 PCIe Root Bus
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*/
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#define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root"
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struct PnvPHB4RootBus {
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PCIBus parent;
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uint32_t chip_id;
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uint32_t phb_id;
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};
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OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4RootBus, PNV_PHB4_ROOT_BUS)
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/*
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* PHB4 PCIe Host Bridge for PowerNV machines (POWER9)
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