armv7m_nvic: fix AIRCR implementation
The returned reset value was wrong (off by one zero nibble), and qemu didn't log unimplemented writes to the PRIGROUP field. Signed-off-by: Oran Avraham <oranav@gmail.com> Message-id: 1403010447-4627-1-git-send-email-oranav@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -211,7 +211,7 @@ static uint32_t nvic_readl(nvic_state *s, uint32_t offset)
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cpu = ARM_CPU(current_cpu);
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return cpu->env.v7m.vecbase;
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case 0xd0c: /* Application Interrupt/Reset Control. */
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return 0xfa05000;
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return 0xfa050000;
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case 0xd10: /* System Control. */
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/* TODO: Implement SLEEPONEXIT. */
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return 0;
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@ -346,6 +346,9 @@ static void nvic_writel(nvic_state *s, uint32_t offset, uint32_t value)
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if (value & 5) {
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qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
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}
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if (value & 0x700) {
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qemu_log_mask(LOG_UNIMP, "PRIGROUP unimplemented\n");
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}
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}
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break;
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case 0xd10: /* System Control. */
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