target/i386: Added VGIF V_IRQ masking capability
VGIF provides masking capability for when virtual interrupts are taken. (APM2) Signed-off-by: Lara Lazier <laramglazier@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -5657,6 +5657,7 @@ static void x86_cpu_reset(DeviceState *dev)
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/* init to reset state */
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env->int_ctl = 0;
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env->hflags2 |= HF2_GIF_MASK;
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env->hflags2 |= HF2_VGIF_MASK;
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env->hflags &= ~HF_GUEST_MASK;
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cpu_x86_update_cr0(env, 0x60000010);
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@ -6540,10 +6541,12 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request)
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!(env->hflags & HF_INHIBIT_IRQ_MASK))))) {
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return CPU_INTERRUPT_HARD;
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#if !defined(CONFIG_USER_ONLY)
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} else if ((interrupt_request & CPU_INTERRUPT_VIRQ) &&
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} else if (env->hflags2 & HF2_VGIF_MASK) {
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if((interrupt_request & CPU_INTERRUPT_VIRQ) &&
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(env->eflags & IF_MASK) &&
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!(env->hflags & HF_INHIBIT_IRQ_MASK)) {
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return CPU_INTERRUPT_VIRQ;
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return CPU_INTERRUPT_VIRQ;
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}
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#endif
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}
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}
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@ -203,6 +203,7 @@ typedef enum X86Seg {
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#define HF2_MPX_PR_SHIFT 5 /* BNDCFGx.BNDPRESERVE */
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#define HF2_NPT_SHIFT 6 /* Nested Paging enabled */
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#define HF2_IGNNE_SHIFT 7 /* Ignore CR0.NE=0 */
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#define HF2_VGIF_SHIFT 8 /* Can take VIRQ*/
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#define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)
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#define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)
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@ -212,6 +213,7 @@ typedef enum X86Seg {
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#define HF2_MPX_PR_MASK (1 << HF2_MPX_PR_SHIFT)
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#define HF2_NPT_MASK (1 << HF2_NPT_SHIFT)
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#define HF2_IGNNE_MASK (1 << HF2_IGNNE_SHIFT)
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#define HF2_VGIF_MASK (1 << HF2_VGIF_SHIFT)
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#define CR0_PE_SHIFT 0
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#define CR0_MP_SHIFT 1
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@ -130,6 +130,11 @@ static inline bool virtual_gif_enabled(CPUX86State *env)
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return false;
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}
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static inline bool virtual_gif_set(CPUX86State *env)
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{
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return !virtual_gif_enabled(env) || (env->int_ctl & V_GIF_MASK);
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}
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void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
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{
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CPUState *cs = env_cpu(env);
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@ -364,6 +369,10 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
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cs->interrupt_request |= CPU_INTERRUPT_VIRQ;
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}
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if (virtual_gif_set(env)) {
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env->hflags2 |= HF2_VGIF_MASK;
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}
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/* maybe we need to inject an event */
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event_inj = x86_ldl_phys(cs, env->vm_vmcb + offsetof(struct vmcb,
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control.event_inj));
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@ -520,6 +529,7 @@ void helper_stgi(CPUX86State *env)
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if (virtual_gif_enabled(env)) {
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env->int_ctl |= V_GIF_MASK;
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env->hflags2 |= HF2_VGIF_MASK;
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} else {
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env->hflags2 |= HF2_GIF_MASK;
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}
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@ -531,6 +541,7 @@ void helper_clgi(CPUX86State *env)
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if (virtual_gif_enabled(env)) {
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env->int_ctl &= ~V_GIF_MASK;
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env->hflags2 &= ~HF2_VGIF_MASK;
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} else {
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env->hflags2 &= ~HF2_GIF_MASK;
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}
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@ -812,6 +823,7 @@ void do_vmexit(CPUX86State *env)
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env->vm_vmcb + offsetof(struct vmcb, control.event_inj), 0);
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env->hflags2 &= ~HF2_GIF_MASK;
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env->hflags2 &= ~HF2_VGIF_MASK;
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/* FIXME: Resets the current ASID register to zero (host ASID). */
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/* Clears the V_IRQ and V_INTR_MASKING bits inside the processor. */
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