esp: fix esp_reg_read() trace event
Move the trace event to the end of the function so that it correctly reports the returned value if it doesn't come directly from the rregs array. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210304221103.6369-7-mark.cave-ayland@ilande.co.uk>
This commit is contained in:
parent
0097d3ec17
commit
b630c075a2
@ -594,9 +594,8 @@ static void parent_esp_reset(ESPState *s, int irq, int level)
|
|||||||
|
|
||||||
uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
|
uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
|
||||||
{
|
{
|
||||||
uint32_t old_val;
|
uint32_t val;
|
||||||
|
|
||||||
trace_esp_mem_readb(saddr, s->rregs[saddr]);
|
|
||||||
switch (saddr) {
|
switch (saddr) {
|
||||||
case ESP_FIFO:
|
case ESP_FIFO:
|
||||||
if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
|
if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
|
||||||
@ -611,13 +610,14 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
|
|||||||
s->ti_rptr = 0;
|
s->ti_rptr = 0;
|
||||||
s->ti_wptr = 0;
|
s->ti_wptr = 0;
|
||||||
}
|
}
|
||||||
|
val = s->rregs[ESP_FIFO];
|
||||||
break;
|
break;
|
||||||
case ESP_RINTR:
|
case ESP_RINTR:
|
||||||
/*
|
/*
|
||||||
* Clear sequence step, interrupt register and all status bits
|
* Clear sequence step, interrupt register and all status bits
|
||||||
* except TC
|
* except TC
|
||||||
*/
|
*/
|
||||||
old_val = s->rregs[ESP_RINTR];
|
val = s->rregs[ESP_RINTR];
|
||||||
s->rregs[ESP_RINTR] = 0;
|
s->rregs[ESP_RINTR] = 0;
|
||||||
s->rregs[ESP_RSTAT] &= ~STAT_TC;
|
s->rregs[ESP_RSTAT] &= ~STAT_TC;
|
||||||
s->rregs[ESP_RSEQ] = SEQ_CD;
|
s->rregs[ESP_RSEQ] = SEQ_CD;
|
||||||
@ -626,16 +626,22 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
|
|||||||
esp_report_command_complete(s, s->deferred_status);
|
esp_report_command_complete(s, s->deferred_status);
|
||||||
s->deferred_complete = false;
|
s->deferred_complete = false;
|
||||||
}
|
}
|
||||||
return old_val;
|
break;
|
||||||
case ESP_TCHI:
|
case ESP_TCHI:
|
||||||
/* Return the unique id if the value has never been written */
|
/* Return the unique id if the value has never been written */
|
||||||
if (!s->tchi_written) {
|
if (!s->tchi_written) {
|
||||||
return s->chip_id;
|
val = s->chip_id;
|
||||||
|
} else {
|
||||||
|
val = s->rregs[saddr];
|
||||||
}
|
}
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
|
val = s->rregs[saddr];
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
return s->rregs[saddr];
|
|
||||||
|
trace_esp_mem_readb(saddr, val);
|
||||||
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
|
void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
|
||||||
|
Loading…
Reference in New Issue
Block a user