From b5b63d43a0d2b3c3a914a30b0443ce3f04c0db5c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Sun, 14 Feb 2021 18:58:35 +0100 Subject: [PATCH] target/mips: Rename 128-bit upper halve GPR registers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TCG displays the upper halve registers with the same name as their lower halves. Rename the upper halves with the '[hi]' suffix. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210214175912.732946-6-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/translate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/target/mips/translate.c index 2df7659247..5228e04084 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -29289,10 +29289,12 @@ void mips_tcg_init(void) cpu_gpr_hi[0] = NULL; for (unsigned i = 1; i < 32; i++) { + g_autofree char *rname = g_strdup_printf("%s[hi]", regnames[i]); + cpu_gpr_hi[i] = tcg_global_mem_new_i64(cpu_env, offsetof(CPUMIPSState, active_tc.gpr_hi[i]), - regnames[i]); + rname); } #endif /* !TARGET_MIPS64 */ for (i = 0; i < 32; i++) {