Sparc64: split DPRINTF into CPUIRQ and EBUS versions
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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302698e882
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b430a22562
24
hw/sun4u.c
24
hw/sun4u.c
@ -39,12 +39,20 @@
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#include "elf.h"
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//#define DEBUG_IRQ
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//#define DEBUG_EBUS
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#ifdef DEBUG_IRQ
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#define DPRINTF(fmt, ...) \
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#define CPUIRQ_DPRINTF(fmt, ...) \
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do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DPRINTF(fmt, ...)
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#define CPUIRQ_DPRINTF(fmt, ...)
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#endif
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#ifdef DEBUG_EBUS
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#define EBUS_DPRINTF(fmt, ...) \
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do { printf("EBUS: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define EBUS_DPRINTF(fmt, ...)
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#endif
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#define KERNEL_LOAD_ADDR 0x00404000
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@ -238,14 +246,14 @@ void cpu_check_irqs(CPUState *env)
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env->interrupt_index = TT_EXTINT | i;
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if (old_interrupt != env->interrupt_index) {
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DPRINTF("Set CPU IRQ %d\n", i);
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CPUIRQ_DPRINTF("Set CPU IRQ %d\n", i);
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cpu_interrupt(env, CPU_INTERRUPT_HARD);
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}
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break;
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}
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}
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} else if (!pil && (env->interrupt_index & ~15) == TT_EXTINT) {
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DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
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CPUIRQ_DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
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env->interrupt_index = 0;
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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}
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@ -256,12 +264,12 @@ static void cpu_set_irq(void *opaque, int irq, int level)
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CPUState *env = opaque;
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if (level) {
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DPRINTF("Raise CPU IRQ %d\n", irq);
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CPUIRQ_DPRINTF("Raise CPU IRQ %d\n", irq);
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env->halted = 0;
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env->pil_in |= 1 << irq;
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cpu_check_irqs(env);
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} else {
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DPRINTF("Lower CPU IRQ %d\n", irq);
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CPUIRQ_DPRINTF("Lower CPU IRQ %d\n", irq);
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env->pil_in &= ~(1 << irq);
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cpu_check_irqs(env);
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}
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@ -347,8 +355,8 @@ void cpu_tick_set_limit(void *opaque, uint64_t limit)
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static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num,
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pcibus_t addr, pcibus_t size, int type)
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{
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DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n", region_num,
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addr);
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EBUS_DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n",
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region_num, addr);
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switch (region_num) {
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case 0:
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isa_mmio_init(addr, 0x1000000);
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