target/riscv: convert to DisasJumpType
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Cc: Michael Clark <mjc@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -26,6 +26,7 @@
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#include "exec/helper-proto.h"
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#include "exec/helper-gen.h"
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#include "exec/translator.h"
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#include "exec/log.h"
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#include "instmap.h"
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@ -46,7 +47,7 @@ typedef struct DisasContext {
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uint32_t flags;
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uint32_t mem_idx;
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int singlestep_enabled;
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int bstate;
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DisasJumpType is_jmp;
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/* Remember the rounding mode encoded in the previous fp instruction,
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which we have already installed into env->fp_status. Or -1 for
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no previous fp instruction. Note that we exit the TB when writing
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@ -55,13 +56,6 @@ typedef struct DisasContext {
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int frm;
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} DisasContext;
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enum {
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BS_NONE = 0, /* When seen outside of translation while loop, indicates
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need to exit tb due to end of page. */
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BS_STOP = 1, /* Need to exit tb for syscall, sret, etc. */
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BS_BRANCH = 2, /* Need to exit tb for branch, jal, etc. */
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};
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/* convert riscv funct3 to qemu memop for load/store */
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static const int tcg_memop_lookup[8] = {
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[0 ... 7] = -1,
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@ -88,7 +82,7 @@ static void generate_exception(DisasContext *ctx, int excp)
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TCGv_i32 helper_tmp = tcg_const_i32(excp);
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gen_helper_raise_exception(cpu_env, helper_tmp);
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tcg_temp_free_i32(helper_tmp);
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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}
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static void generate_exception_mbadaddr(DisasContext *ctx, int excp)
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@ -98,7 +92,7 @@ static void generate_exception_mbadaddr(DisasContext *ctx, int excp)
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TCGv_i32 helper_tmp = tcg_const_i32(excp);
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gen_helper_raise_exception(cpu_env, helper_tmp);
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tcg_temp_free_i32(helper_tmp);
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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}
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static void gen_exception_debug(void)
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@ -531,7 +525,7 @@ static void gen_jal(CPURISCVState *env, DisasContext *ctx, int rd,
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}
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gen_goto_tb(ctx, 0, ctx->pc + imm); /* must use this for safety */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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}
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static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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@ -562,7 +556,7 @@ static void gen_jalr(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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gen_set_label(misaligned);
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gen_exception_inst_addr_mis(ctx);
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}
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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break;
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default:
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@ -616,7 +610,7 @@ static void gen_branch(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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} else {
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gen_goto_tb(ctx, 0, ctx->pc + bimm);
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}
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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}
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static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1,
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@ -1344,12 +1338,12 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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/* always generates U-level ECALL, fixed in do_interrupt handler */
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generate_exception(ctx, RISCV_EXCP_U_ECALL);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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break;
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case 0x1: /* EBREAK */
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generate_exception(ctx, RISCV_EXCP_BREAKPOINT);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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break;
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#ifndef CONFIG_USER_ONLY
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case 0x002: /* URET */
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@ -1359,7 +1353,7 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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if (riscv_has_ext(env, RVS)) {
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gen_helper_sret(cpu_pc, cpu_env, cpu_pc);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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} else {
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gen_exception_illegal(ctx);
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}
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@ -1370,7 +1364,7 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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case 0x302: /* MRET */
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gen_helper_mret(cpu_pc, cpu_env, cpu_pc);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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break;
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case 0x7b2: /* DRET */
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gen_exception_illegal(ctx);
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@ -1419,7 +1413,7 @@ static void gen_system(CPURISCVState *env, DisasContext *ctx, uint32_t opc,
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/* end tb since we may be changing priv modes, to get mmu_index right */
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tcg_gen_movi_tl(cpu_pc, ctx->next_pc);
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tcg_gen_exit_tb(0); /* no chaining */
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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break;
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}
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tcg_temp_free(source1);
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@ -1812,7 +1806,7 @@ static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx)
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* however we need to end the translation block */
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tcg_gen_movi_tl(cpu_pc, ctx->next_pc);
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tcg_gen_exit_tb(0);
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ctx->bstate = BS_BRANCH;
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ctx->is_jmp = DISAS_NORETURN;
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} else {
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/* FENCE is a full memory barrier. */
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tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
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@ -1862,7 +1856,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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ctx.singlestep_enabled = cs->singlestep_enabled;
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ctx.tb = tb;
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ctx.bstate = BS_NONE;
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ctx.is_jmp = DISAS_NEXT;
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ctx.flags = tb->flags;
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ctx.mem_idx = tb->flags & TB_FLAGS_MMU_MASK;
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ctx.frm = -1; /* unknown rounding mode */
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@ -1877,13 +1871,13 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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}
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gen_tb_start(tb);
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while (ctx.bstate == BS_NONE) {
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while (ctx.is_jmp == DISAS_NEXT) {
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tcg_gen_insn_start(ctx.pc);
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num_insns++;
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if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) {
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tcg_gen_movi_tl(cpu_pc, ctx.pc);
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ctx.bstate = BS_BRANCH;
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ctx.is_jmp = DISAS_NORETURN;
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gen_exception_debug();
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/* The address covered by the breakpoint must be included in
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[tb->pc, tb->pc + tb->size) in order to for it to be
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@ -1901,31 +1895,20 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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decode_opc(env, &ctx);
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ctx.pc = ctx.next_pc;
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if (cs->singlestep_enabled) {
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break;
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if (ctx.is_jmp == DISAS_NEXT &&
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(cs->singlestep_enabled ||
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ctx.pc - page_start >= TARGET_PAGE_SIZE ||
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tcg_op_buf_full() ||
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num_insns >= max_insns ||
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singlestep)) {
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ctx.is_jmp = DISAS_TOO_MANY;
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}
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if (ctx.pc - page_start >= TARGET_PAGE_SIZE) {
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break;
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}
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if (tcg_op_buf_full()) {
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break;
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}
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if (num_insns >= max_insns) {
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break;
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}
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if (singlestep) {
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break;
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}
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}
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if (tb->cflags & CF_LAST_IO) {
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gen_io_end();
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}
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switch (ctx.bstate) {
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case BS_STOP:
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gen_goto_tb(&ctx, 0, ctx.pc);
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break;
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case BS_NONE: /* handle end of page - DO NOT CHAIN. See gen_goto_tb. */
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switch (ctx.is_jmp) {
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case DISAS_TOO_MANY:
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tcg_gen_movi_tl(cpu_pc, ctx.pc);
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if (cs->singlestep_enabled) {
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gen_exception_debug();
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@ -1933,9 +1916,10 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
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tcg_gen_exit_tb(0);
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}
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break;
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case BS_BRANCH: /* ops using BS_BRANCH generate own exit seq */
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default:
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case DISAS_NORETURN:
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break;
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default:
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g_assert_not_reached();
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}
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done_generating:
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gen_tb_end(tb, num_insns);
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