From b267e78908afd450433ef44d840c4ff30ba37676 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 9 Feb 2024 08:47:48 +0100 Subject: [PATCH] target/mips: Remove MIPSITUState::itu field MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previous commits removed the MT*C0(SAAR) helpers which were using CPUMIPSState::itu, we can now remove it too. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240209090513.9401-4-philmd@linaro.org> --- hw/mips/cps.c | 1 - target/mips/cpu.h | 1 - 2 files changed, 2 deletions(-) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 4f12e23ab5..988ceaa0b9 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -96,7 +96,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) itu_present = true; /* Attach ITC Tag to the VP */ env->itc_tag = mips_itu_get_tag_region(&s->itu); - env->itu = &s->itu; } qemu_register_reset(main_cpu_reset, cpu); } diff --git a/target/mips/cpu.h b/target/mips/cpu.h index b4788e1af2..d54e9a4a1c 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1184,7 +1184,6 @@ typedef struct CPUArchState { #if !defined(CONFIG_USER_ONLY) CPUMIPSTLBContext *tlb; qemu_irq irq[8]; - struct MIPSITUState *itu; MemoryRegion *itc_tag; /* ITC Configuration Tags */ /* Loongson IOCSR memory */