remove DEC 21154 PCI bridge
Code has not been used practically since its inception (2004)
f2aa58c6f4 UniNorth PCI bridge support
or maybe even earlier, but it was consuming contributors time
as QEMU was being rewritten.
Drop it for now. Whomever would like to actually
use the thing, can make sure it actually works/reintroduce
it back when there is a user.
PS:
I've stumbled upon this when replacing PCIDeviceClass::is_bridge
field with QOM cast to PCI_BRIDGE type. Unused DEC 21154
was the only one trying to use the field with plain PCIDevice.
It's not worth keeping the field around for the sake of the code
that was commented out 'forever'.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20221129101341.185621-2-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov
Michael S. Tsirkin
parent
345cc1cbcb
commit
b1fbf24259
@ -1,164 +0,0 @@
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/*
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* QEMU DEC 21154 PCI bridge
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*
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* Copyright (c) 2006-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "dec.h"
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#include "hw/sysbus.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_host.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_bus.h"
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#include "qom/object.h"
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OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154)
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struct DECState {
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PCIHostState parent_obj;
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};
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static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return irq_num;
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}
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static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
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{
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pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
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}
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static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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k->realize = dec_pci_bridge_realize;
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k->exit = pci_bridge_exitfn;
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k->vendor_id = PCI_VENDOR_ID_DEC;
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k->device_id = PCI_DEVICE_ID_DEC_21154;
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k->config_write = pci_bridge_write_config;
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k->is_bridge = true;
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dc->desc = "DEC 21154 PCI-PCI bridge";
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dc->reset = pci_bridge_reset;
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dc->vmsd = &vmstate_pci_device;
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}
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static const TypeInfo dec_21154_pci_bridge_info = {
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.name = "dec-21154-p2p-bridge",
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.parent = TYPE_PCI_BRIDGE,
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.instance_size = sizeof(PCIBridge),
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.class_init = dec_21154_pci_bridge_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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};
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PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
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{
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PCIDevice *dev;
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PCIBridge *br;
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dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
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br = PCI_BRIDGE(dev);
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pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
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pci_realize_and_unref(dev, parent_bus, &error_fatal);
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return pci_bridge_get_sec_bus(br);
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}
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static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
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{
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PCIHostState *phb;
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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phb = PCI_HOST_BRIDGE(dev);
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memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
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dev, "pci-conf-idx", 0x1000);
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memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
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dev, "pci-data-idx", 0x1000);
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sysbus_init_mmio(sbd, &phb->conf_mem);
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sysbus_init_mmio(sbd, &phb->data_mem);
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}
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static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
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{
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/* PCI2PCI bridge same values as PearPC - check this */
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}
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static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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k->realize = dec_21154_pci_host_realize;
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k->vendor_id = PCI_VENDOR_ID_DEC;
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k->device_id = PCI_DEVICE_ID_DEC_21154;
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k->revision = 0x02;
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k->class_id = PCI_CLASS_BRIDGE_PCI;
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k->is_bridge = true;
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/*
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* PCI-facing part of the host bridge, not usable without the
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* host-facing part, which can't be device_add'ed, yet.
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*/
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dc->user_creatable = false;
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}
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static const TypeInfo dec_21154_pci_host_info = {
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.name = "dec-21154",
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCIDevice),
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.class_init = dec_21154_pci_host_class_init,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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};
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static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pci_dec_21154_device_realize;
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}
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static const TypeInfo pci_dec_21154_device_info = {
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.name = TYPE_DEC_21154,
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.parent = TYPE_PCI_HOST_BRIDGE,
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.instance_size = sizeof(DECState),
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.class_init = pci_dec_21154_device_class_init,
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};
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static void dec_register_types(void)
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{
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type_register_static(&pci_dec_21154_device_info);
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type_register_static(&dec_21154_pci_host_info);
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type_register_static(&dec_21154_pci_bridge_info);
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}
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type_init(dec_register_types)
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@ -1,9 +0,0 @@
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#ifndef HW_PCI_BRIDGE_DEC_H
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#define HW_PCI_BRIDGE_DEC_H
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#define TYPE_DEC_21154 "dec-21154-sysbus"
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PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn);
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#endif
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@ -8,8 +8,6 @@ pci_ss.add(when: 'CONFIG_PXB', if_true: files('pci_expander_bridge.c'),
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pci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c', 'xio3130_downstream.c'))
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pci_ss.add(when: 'CONFIG_XIO3130', if_true: files('xio3130_upstream.c', 'xio3130_downstream.c'))
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pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c', 'cxl_downstream.c'))
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pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c', 'cxl_downstream.c'))
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# NewWorld PowerMac
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pci_ss.add(when: 'CONFIG_DEC_PCI', if_true: files('dec.c'))
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# Sun4u
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# Sun4u
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pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
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pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
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@ -128,11 +128,10 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
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pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
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pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
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/* DEC 21154 bridge */
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/*
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#if 0
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* DEC 21154 bridge was unused for many years, this comment is
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/* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
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* a placeholder for whoever wishes to resurrect it
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pci_create_simple(h->bus, PCI_DEVFN(12, 0), "dec-21154");
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*/
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#endif
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}
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}
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static void pci_unin_main_init(Object *obj)
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static void pci_unin_main_init(Object *obj)
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@ -169,7 +169,6 @@
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#define PCI_VENDOR_ID_DEC 0x1011
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#define PCI_VENDOR_ID_DEC 0x1011
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#define PCI_DEVICE_ID_DEC_21143 0x0019
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#define PCI_DEVICE_ID_DEC_21143 0x0019
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#define PCI_DEVICE_ID_DEC_21154 0x0026
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#define PCI_VENDOR_ID_CIRRUS 0x1013
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#define PCI_VENDOR_ID_CIRRUS 0x1013
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