target/riscv: Remove redundant insn length check for zama16b
Compressed encodings also applies to zama16b. https://github.com/riscv/riscv-isa-manual/pull/1557 Suggested-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240802072417.659-2-zhiwei_liu@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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@ -47,7 +47,7 @@ static bool trans_fld(DisasContext *ctx, arg_fld *a)
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REQUIRE_FPU;
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REQUIRE_EXT(ctx, RVD);
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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@ -67,7 +67,7 @@ static bool trans_fsd(DisasContext *ctx, arg_fsd *a)
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REQUIRE_FPU;
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REQUIRE_EXT(ctx, RVD);
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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@ -48,7 +48,7 @@ static bool trans_flw(DisasContext *ctx, arg_flw *a)
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REQUIRE_FPU;
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REQUIRE_EXT(ctx, RVF);
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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@ -70,7 +70,7 @@ static bool trans_fsw(DisasContext *ctx, arg_fsw *a)
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REQUIRE_FPU;
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REQUIRE_EXT(ctx, RVF);
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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@ -268,7 +268,7 @@ static bool gen_load(DisasContext *ctx, arg_lb *a, MemOp memop)
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{
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bool out;
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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decode_save_opc(ctx);
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@ -369,7 +369,7 @@ static bool gen_store_i128(DisasContext *ctx, arg_sb *a, MemOp memop)
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static bool gen_store(DisasContext *ctx, arg_sb *a, MemOp memop)
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{
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if (ctx->cfg_ptr->ext_zama16b && (ctx->cur_insn_len != 2)) {
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if (ctx->cfg_ptr->ext_zama16b) {
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memop |= MO_ATOM_WITHIN16;
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}
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decode_save_opc(ctx);
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