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xtensa fixes for 3.1:

Browse Source 
- fix register counting logic for linux-user gdbserver;
 - provide default memory sizes for XTFPGA boards;
 - add missing xtensa patterns to MAINTAINTERS.
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Merge remote-tracking branch 'remotes/xtensa/tags/20181125-xtensa' into staging

xtensa fixes for 3.1:

- fix register counting logic for linux-user gdbserver;
- provide default memory sizes for XTFPGA boards;
- add missing xtensa patterns to MAINTAINTERS.

# gpg: Signature made Sun 25 Nov 2018 23:07:54 GMT
# gpg:                using RSA key 51F9CC91F83FA044
# gpg: Good signature from "Max Filippov <filippov@cadence.com>"
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>"
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>"
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20181125-xtensa:
  MAINTAINERS: add missing xtensa patterns
  target/xtensa: xtfpga: provide default memory sizes
  target/xtensa: drop num_[core_]regs from dc232b/dc233c configs
  target/xtensa: gdbstub fix register counting

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2018-11-26 11:07:35 +00:00
commit b05730a876
7 changed files with 22 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
MAINTAINERS
View File

@ -311,6 +311,8 @@ F: target/xtensa/
F: hw/xtensa/
F: tests/tcg/xtensa/
F: disas/xtensa.c
F: include/hw/xtensa/xtensa-isa.h
F: default-configs/xtensa*.mak
TriCore
M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>

10
hw/xtensa/xtfpga.c
View File

@ -446,6 +446,8 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
}
}
#define XTFPGA_MMU_RESERVED_MEMORY_SIZE (128 * MiB)
static const hwaddr xtfpga_mmu_io[2] = {
0xf0000000,
};
@ -568,6 +570,7 @@ static void xtfpga_lx60_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_lx60_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
mc->default_ram_size = 64 * MiB;
}
static const TypeInfo xtfpga_lx60_type = {
@ -584,6 +587,7 @@ static void xtfpga_lx60_nommu_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_lx60_nommu_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
mc->default_ram_size = 64 * MiB;
}
static const TypeInfo xtfpga_lx60_nommu_type = {
@ -600,6 +604,7 @@ static void xtfpga_lx200_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_lx200_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
mc->default_ram_size = 96 * MiB;
}
static const TypeInfo xtfpga_lx200_type = {
@ -616,6 +621,7 @@ static void xtfpga_lx200_nommu_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_lx200_nommu_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
mc->default_ram_size = 96 * MiB;
}
static const TypeInfo xtfpga_lx200_nommu_type = {
@ -632,6 +638,7 @@ static void xtfpga_ml605_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_ml605_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
mc->default_ram_size = 512 * MiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
}
static const TypeInfo xtfpga_ml605_type = {
@ -648,6 +655,7 @@ static void xtfpga_ml605_nommu_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_ml605_nommu_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
mc->default_ram_size = 256 * MiB;
}
static const TypeInfo xtfpga_ml605_nommu_type = {
@ -664,6 +672,7 @@ static void xtfpga_kc705_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_kc705_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE;
mc->default_ram_size = 1 * GiB - XTFPGA_MMU_RESERVED_MEMORY_SIZE;
}
static const TypeInfo xtfpga_kc705_type = {
@ -680,6 +689,7 @@ static void xtfpga_kc705_nommu_class_init(ObjectClass *oc, void *data)
mc->init = xtfpga_kc705_nommu_init;
mc->max_cpus = 4;
mc->default_cpu_type = XTENSA_DEFAULT_CPU_NOMMU_TYPE;
mc->default_ram_size = 256 * MiB;
}
static const TypeInfo xtfpga_kc705_nommu_type = {

2
target/xtensa/core-dc232b.c
View File

@ -40,8 +40,6 @@
static XtensaConfig dc232b __attribute__((unused)) = {
.name = "dc232b",
.gdb_regmap = {
.num_regs = 120,
.num_core_regs = 52,
.reg = {
#include "core-dc232b/gdb-config.inc.c"
}

1
target/xtensa/core-dc232b/gdb-config.inc.c
View File

@ -259,3 +259,4 @@
0, 0, 0, 0, 0, 0)
XTREG(119, 476, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15,
0, 0, 0, 0, 0, 0)
XTREG_END

2
target/xtensa/core-dc233c.c
View File

@ -40,8 +40,6 @@
static XtensaConfig dc233c __attribute__((unused)) = {
.name = "dc233c",
.gdb_regmap = {
.num_regs = 121,
.num_core_regs = 52,
.reg = {
#include "core-dc233c/gdb-config.inc.c"
}

1
target/xtensa/core-dc233c/gdb-config.inc.c
View File

@ -143,3 +143,4 @@ XTREG(117, 468, 32, 4, 4, 0x000c, 0x0006, -2, 8, 0x0100, a12, 0, 0, 0, 0
XTREG(118, 472, 32, 4, 4, 0x000d, 0x0006, -2, 8, 0x0100, a13, 0, 0, 0, 0, 0, 0)
XTREG(119, 476, 32, 4, 4, 0x000e, 0x0006, -2, 8, 0x0100, a14, 0, 0, 0, 0, 0, 0)
XTREG(120, 480, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15, 0, 0, 0, 0, 0, 0)
XTREG_END

11
target/xtensa/gdbstub.c
View File

@ -45,15 +45,20 @@ void xtensa_count_regs(const XtensaConfig *config,
unsigned *n_regs, unsigned *n_core_regs)
{
unsigned i;
bool count_core_regs = true;
for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
if (config->gdb_regmap.reg[i].type != xtRegisterTypeTieState &&
config->gdb_regmap.reg[i].type != xtRegisterTypeMapped &&
config->gdb_regmap.reg[i].type != xtRegisterTypeUnmapped) {
++*n_regs;
if ((config->gdb_regmap.reg[i].flags &
XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
++*n_core_regs;
if (count_core_regs) {
if ((config->gdb_regmap.reg[i].flags &
XTENSA_REGISTER_FLAGS_PRIVILEGED) == 0) {
++*n_core_regs;
} else {
count_core_regs = false;
}
}
}
}